|
VHDL Tips, Tricks, and Tools |
| Tips
1. Use good tools- How do you know what's a good tool? Look around your work environment and ask others what they use. Here's what I use and why. PS. I don't get paid by any of these companies I just like their products. 
Simulator 
Programming Language 2. Use make- make is a program that will build your project even when you can't remember all of the dependencies. make is available for most platforms including Windows. A free ware version called dmake can be found here. Also, my simulator has a build in program called vmake.exe for creating makefiles that dmake uses. Check out my make/vmake tutorial. 3. Don't use a mouse-All commands should be stored in a makefile or script and your final output shouldn't depend on you or anyone else clicking on a particular spot on the screen. See make and perl about how to automate your daily work. 4. Compile often - Don't wait for more than 5 minutes between each compile. If you do you'll be trouble shooting code that you wrote hours or days ago. If you're like me and have occasional fits of brilliance but don't follow through with compiling those good ideas you risk flushing them down the drain if you can't get them compiled. 5. Accept the fact that your hardware design is now a software project -This was taught to me by the smartest software guy I know and I just couldn't accept it at the time. Now several years later I realize he was right...Damn it I hate when Oddbert was right... 6. Learn RCS-RCS is revision control software. It let's you retrieve any version of previously checked-in code. It's very simple to use and the software is free. 7. Adapt coding guidelines-Read
Modeling Guidelines by Janick Bergeron
|
|
Tricks - coming... |
|
Tools |
|
I've developed some simple formatting tools to help in vhdl coding. Most are not ready for primetime. Here's one that is getting close. |
| casevhdl |
|
casevhdl.pl is a perl
script that I've written to make your VHDL
pretty. It will convert your .vhd file to a .html file with syntax
highlighitng or just lowercase all reserved words and uppercase user labels
and spit this back out to stdout. Here's some more info.
The latter usage is quite nice since you can use it as a filter in your
text editor like, vim. This way
you concentrate on writing the code and let casevhdl.pl make it pretty.
Download here. |
8. VHDL Book I recommend-It's not the sugar coated hold your hand book of the year but this is the one I recommend when students ask. Mr. Bhasker gives a nice concise tutorial chapter and the rest is reference. It could be a little better in the testbench area. If you click on the link and buy the book I will get some sort of kickback. I'm not sure what the amount actually is since no one has actually done it but if you do, thanks!
