AT89C2051/ AT89C4051 AD Converter with 64 Voltage step

 

By Dillian Wong, 6/1/04 

Abstract

 In this article I will be showing the results of an experiment using 2051 as an Analog to digital converter with 64 voltage steps. This experiment will show using 2051 as an AD converter, the performance is not good for measuring the sensitive voltage source. The methods adopted in this converter are not as accurate as the ADC084 but it is less expensive, uses less power, and is easily modified to suit specific needs.

 

Introduction

 The method uses the build in analog comparator on the 2051. The voltage source (normally generated by sensor circuit) is connected to the negative input of the comparator (P1.1). 2051 is programmed that will drive the ladder circuit and generate a reference voltage connected to the positive input of the comparator (P1.0). The output of the comparator goes to P3.6. P3.6 is not an external pin on the 2051. It can only be accessed by the internal software. If the voltage at P1.0 is higher than P1.1 then P3.6 will be 1. If the voltage at P1.0 is lower than P1.1 then P3.6 will be a 0.

 

By using the other 6 pins of Port 1(P1.2-P1.7). We can generate a voltage using a resistor network connected to those pins. By changing the values of the port 1 pins. It can get as close as possible to matching the voltage source. Then we will have a 6 bit digital value that is a reflection of voltage source.

These 6 pins are connected to V0 through a resistor. Setting a pin to 0 or 1 will change the equivalent resistance that is combined by 6 pins to V0 resistors. When a pin is 0, that pin resistance is contributed to the equivalent resistance; when a pin is 1 that pin resistance does not contribute to the equivalent resistance as two ports is +5V. The resistor Ra determines the actual voltage at V0.

 

To find the right digital output to create the right voltage to match the voltage at P1.1(V1), the program start at 000000 and count up until the comparator output at p3.6 switches to 1. Then notice the user that the generated voltage is higher than the voltage source. That is a ramp type AD conversation. For faster conversation, the successive approximation conversation should be used.

 

Experiment

 

Increase the digital voltage step, measure the reference voltage that generated by the ladder circuit and potential divider. No analogy input signal is applied.

 

Measurement

 

Digit Step

Analog Voltage (V)

 

Digit Step

Analog Voltage (V)

 

Set1

Set2

 

 

Set1

Set2

0

5.073

5.078

 

34

2.512

2.499

1

4.88

4.883

 

35

2.418

2.404

2

4.769

4.774

 

36

2.447

2.434

3

4.547

4.551

 

37

2.355

2.341

4

4.429

4.434

 

38

2.336

2.321

5

4.222

4.227

 

39

2.251

2.236

6

4.131

4.135

 

40

2.348

2.334

7

3.944

3.945

 

41

2.261

2.246

8

4.002

4.002

 

42

2.242

2.227

9

3.817

3.817

 

43

2.16

2.146

10

3.74

3.739

 

44

2.182

2.168

11

3.572

3.571

 

45

2.103

2.089

12

3.515

3.513

 

46

2.085

2.072

13

3.359

3.357

 

47

2.019

1.998

14

3.295

3.293

 

48

2.159

2.141

15

3.152

3.15

 

49

2.08

2.06

16

3.287

3.285

 

50

2.065

2.044

17

3.141

3.139

 

51

1.992

1.97

18

3.09

3.088

 

52

2.01

1.988

19

2.958

2.959

 

53

1.938

1.916

20

2.967

2.969

 

54

1.923

1.901

21

2.846

2.849

 

55

1.855

1.834

22

2.809

2.818

 

56

1.928

1.907

23

2.714

2.71

 

57

1.859

1.838

24

2.834

2.829

 

58

1.844

1.823

25

2.723

2.717

 

59

1.779

1.759

26

2.695

2.69

 

60

1.792

1.772

27

2.594

2.587

 

61

1.728

1.77

28

2.622

2.614

 

62

1.712

1.695

29

2.522

2.515

 

63

1.65

1.636

30

2.497

2.492

 

 

 

 

31

2.397

2.406

 

 

 

 

32

2.635

2.625

 

 

 

 

33

2.533

2.521

 

 

 

 

Results

The results show that the digital output corresponding the generation of the voltage reference V0 is not perfect linear. 1) Fluctuation at some digit values, and this will restrict the tracking of the AD conservation. The lower digit may have voltage lesser the higher digit. 2) The falling rate of voltage at higher digit side is less than that at lower digit side; the weight of each voltage step is not equal. The non-linear problem towards the voltage step is due to the mismatch of the ladder circuit resistance that is used to generate a reference voltage.

 

Conclusion 

For low accurate AD-converter, 2051 is simple and less expensive. When using 2051 as an AD converter using ladder circuit method, the number of voltage step should be minimize. Fluctuation and difference voltage step will limit the number of voltage step, or make the many voltage steps meaningless. The application using 2051 analog comparator is better to measure the time interval when the voltage source from one starting voltage to one particular reference voltage. In this case several voltage step only used.