Dr. Marc Stephen Bright BEng(Hons) PhD AMIEE


Contact Information - Publications - Summary of Education

I am currently a Design Engineer working on digital signal processing IC design and development at Broadcom, Bristol, UK (formerly Element 14). We are developing a two chip aDSL communications solution that incorporates the Santorini DSL processor. This high-performance, complex SOC is built using a combination of automatic EDA tool flows and full-custom build/placement/routing techniques that require considerable expertise throughout the ASIC flow. The team philosophy of wide technical expertise means that I am working with RTL->Netlist synthesis tools, full-custom structural placement, deep submicron timing analysis and floorplanning to mention a few areas. PERL, Cadence Envisia and Ambit, Silicon Ensemble and other commercial and in-house developed software are some of the tools I use for this work.

I was formerly a member of the Electronic Circuits and Systems research group at Cardiff University where I was involved in a variety of research projects. My main research interests were in the areas of mobile communication systems inlcuding;  DSP, low-power processing, power amplifier linearisation,VLSI synthesis, high-level synthesis and Computer Aided Design/Engineering (CAD/CAE). I was also a member of the Agilent (formerly Hewlett Packard) Centre for High Frequency Engineering and director of the ERDF Centre for High Frequency Engineering Support.

My PhD research centered on the development of CAD tools for the high-level synthesis of low power signal processing systems.

Representative Publications

Contact Information

Dr M.S. Bright
e-mail : msbright@iee.org

Summary of Education

October 1995-October 1998 University Of Wales Cardiff, School Of Engineering, Circuits And Systems Research Group,. PhD "Evolutionary Strategies for the High-Level Synthesis of VLSI-Based DSP Systems for Low Power". This work looks at the use of AI strategies for the optimal synthesis of low power VLSI integrated circuits, specifically ASIC DSPs. The software is developed using the C language and various VLSI CAD tools. 
Best Paper in the Signal Processing session at GALESIA '97 (IEEE/IEE Conf. Genetic ALgorithms in Engineering Systems:Innovations and Applications).
October 1993-June 1995  University Of Wales Cardiff, School Of Engineering. BEng (Hons) Electronic Engineering (1st Class). Subjects studied include Microprocessors, Digital Design, VLSI Design, Bioengineering, Management, Accounting and Computer Networks. Final Year Project : "Fault Simulation Software For VLSI Systems". 
School of Engineering Award - Best Final Year Project 
IEE Award - Best Performance Over All Electrical Engineering Courses 
Nominated for Royal Society Of Engineering 'Student Engineer Of The Year'.
October 1991-June 1993  University of Wales, Institute Cardiff
HND Electronics (Distinction)


Personal Web Site