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Publication : (Reprints are available upon request) |
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(I) Thesis | ||||||||||||||||||||||||||
(1) C.S.Tan, ECG Signals Classificaiton Using Artificial Neural Network, B.Eng Thesis, University of Malaya, 1999. | ||||||||||||||||||||||||||
(2) C.S.Tan, Rapid Thermal Oxidation of Strained Si/Relaxed SiGe Heterostructure, M.Eng Thesis, Singapore-MIT Alliance, 2001. | ||||||||||||||||||||||||||
(II) Conference | ||||||||||||||||||||||||||
(1) C.S.Tan et al., "Electrical Characterisation of Rapid Thermal Oxides Grown on Strained Si/Relaxed SiGe Heterostructure", Proceeding of the Electrical Engineering Conference 2000 (EEC2000), University of Malaya, Malaysia, 8-9 August 2000. | ||||||||||||||||||||||||||
(2) C.S.Tan et al., "N20 Rapid Thermal Oxidation of Strained Si/Relaxed SiGe Heterostructure grown by UHVCVD", Proceeding of the International Conference on Communication, Computer and Devices (ICCCD2000), IIT Kharagpur, India, Dec 14-16, 2000. | ||||||||||||||||||||||||||
(3) C.S.Tan et al., " Rapid Thermal Oxidation of strained-Si/relaxed-SiGe heterostructure," Proceeding of the Annual Symposium, Singapore-MIT Alliance, 16-17 January 2001. | ||||||||||||||||||||||||||
(4) C.S.Tan (co-author), "The relaxed SiGe Materials Platform : Strained Si MOS," Proceeding of the Annual Symposium, Singapore-MIT Alliance, 16-17 January 2001. | ||||||||||||||||||||||||||
(III) Journal | ||||||||||||||||||||||||||
(1) L.K.Bera, W.K.Choi, C.S.Tan, S.K.Samanta, and C.K.Maiti, "High Quality Gate Dielectrics Grown by Rapid Thermal Processing Using Split-N2O Technique on Strained-Si0.91Ge0.09 Films," IEEE Electron Device Letter, Vol 22, No 8, pp 387-389, August 2001. | ||||||||||||||||||||||||||
(2) C.S.Tan, W.K.Choi, L.K.Bera, K.L.Pey, D.A.Antoniadis, E.A.Fitzgerald, M.T.Currie, and C.K.Maiti, "N2O oxidation of strained-Si/relaxed-SiGe heterostructure grown by UHVCVD," Solid State Electronics 45, pp 1945-1949, 2001. |
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(IV) Inivited Talk | ||||||||||||||||||||||||||
(1) R.Reif, C.S.Tan, A.Fan, K.-N.Chen, S.Das, and N.Checka, "3-D Integration using Cu-Cu Wafer Bonding," DARPA 3D Microelectronics Integration Workshop, San Diego, July 10, 2002. | ||||||||||||||||||||||||||
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