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| All the processing elements simultaneously execute the same instruction and are said to be 'lock-stepped' together. Each processor works on data from its own memory and hence on distinct data streams. (Some systems also provide a shared global memory for communications.) Every processor must be allowed to complete its instruction before the next instruction is taken for execution. Thus, the execution of instructions is said to be synchronous. This category corresponds to the array processors discussed and examples include; ILLIAC-IV, PEPE, BSP, STARAN, MPP, DAP and the Connection Machine (CM-1). word size 64 bits, can work in a half-word 32 bit mode, then appears as an array of 128 processors. front-ended by a Burroughs B6700, later DEC PDP10 processors are arranged in a linear chain and have nearest-neighbour connections, Every processor is able to address the memory of its nearest neighbours. (In addition to the nearest-neighbour connections the ILLIAC-IV also provides direct short-cut communications between every 9th processing element.) These machines can also be called connected arrays. from http://dynamo.ecn.purdue.edu/~hankd/CARP/XPC/paper.html ... Thus, a Glypnir program specification is closely associated with the Illiac IV hardware. The Illiac IV consists of 64 processing elements (PEs) and a single control unit (CU). Each processing element may directly access 2048 words of memory, and may indirectly access any address within the system. Interprocessor communication can take place through an interconnection network that allows PEs to directly communicate with other processors that have logical distances of +-1 or +-8. 1966 - ILLIAC The Department of Defense Advanced Research Projects Agency contracted the University of Illinois to build a large parallel processing computer, the ILLIAC IV, which did not operate until 1972 at NASA's Ames Research Center. The first large-scale array computer, the ILLIAC IV achieved a computation speed of 200 million instructions per second, about 300 million operations per second, and 1 billion bits per second of I/O transfer via a unique combination of parallel architecture and the overlapping or "pipe-lining" structure of its 64 processing elements. This photograph shows one of the ILLIAC's 13 Burroughs disks, the debugging computer, the central unit, and the processing unit cabinet with a processing element. |