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| Architecture: The nCUBE/10 is a message passing hypercube MIMD architecture. Its memory is distributed over the processor and there is no global memory. All the communication takes place through the sharing of message between the nodes. Node: Based on a 32-bit custom chip and an IEEE-754 compliant 64-bit floating point unit, running at 2 MIPS or 500 kFLOPS (32-bit), 300 kFLOPS (64-bit), with 128 Kbytes of memory. Each node runs the Vertex operating system. The configuration used to collect timing data had 128 processors, each with 4 MB of RAM. I/O: NChannel for interfacing to mass storage devices; a graphics board, with a frame buffer that accepts data from the hypercube and display it at 30 frames/s; an Intersystem board that allowed two cubes to be connected; and an Open System board that allows user-designed circuits to be added. Topology: A hypercube with extra I/O boards, one of which must act as a host board. Host boards can partition the machine into sub-cubes and allocate them separately to different users. Operating System: UNIX or VMS Languages: C and Fortran compilers are provided Performance: Peak performance is 300 MFLOPS (64-bit) for a 10-dimensional hypercube with 128 Mbytes of memory and an average I/O bandwidth of 90 Mbytes/s. Scalability: Scales from a 4-dimensional cube (16 nodes) to a 10-dimensional cube (1024 nodes). |