ASQ’s 54th Annual Quality Congress Proceeding, 346 -s 347
ACCELERATED TESTING EXPERIENCE WITH AVIONICS
Vigdor I. Brecher
RAMS Mgr.
Elbit Systems Ltd.
Haifa 31053, Israel
E-mail: vbrecher@netvision.net.il
SUMMARY
This presentation will discuss an approach for optimizing accelerated testing based on continuous follow up and
analysis of the field performances of similar systems. The accelerated testing efficiency will be reviewed in view of
the accumulated experience with avionics equipment. The products on which the methodology were applied range
from helmet-mounted display and guided weapon systems to digital maps and computers. The methodology used will
be presented.
Testing is always performed with fully capable test equipment supervising the performance of the product under
test. Full attention was given in developing and applying such test equipment to highly accelerated life testing (HALT).
Based on the accumulated experience, lessons were learned from the weak points of the supervising equipment. A costsaving
approach in maximization of the reliability to be achieved was established. Failure types that were detected and
corrected were analysed.
Results of comparing an accelerated testing approach with a classical reliability growth specific for avionics
equipment will be a basis in providing future reliability growth programs.
KEY WORDS
accelerated life testing, step-stress testing, test parameters
INTRODUCTION
Accelerated Life Testing (ALT) employs a variety of high-stress test methods that shorten the life of a product or
quicken the degradation of the product’s performance. The goal of such testing is to efficiently obtain performance data
that, when properly analyzed, yield reasonable estimates of the product’s life or performance under normal conditions.
Life testing products under higher stress levels without introducing additional failure modes can provide significant
savings of both time and money. Correct analyses of data gathered via such accelerated life testing will yield
parameters and other information for the product’s life at use stress conditions.
Elbit Systems Ltd. (ESL) used for accelerated testing of its avionics equipment the HALT method developed by
Dr. Gregg Hobbs.
Traditional step-stress approaches (hereafter called simply step-stress) have a number of worthwhile applications
for the analysis of the projected reliability of components and systems. These test methods are considered for many
common situations of accelerated life testing (ALT). Some of the main purposes of ALT are to measure projected system
life and to identify product weaknesses in order to improve reliability. These methods may apply well when only
a small number of systems are available, when extremely long, specialized test equipment is required, when limited
environmental chamber capability and/or test fixtures are involved and, lastly, when very expensive support equipment
represents a serious test limit.
HALT USED AS A DESIGN VERIFICATION TOOL
HALT is implemented as a design verification tool to quickly detect design flaws and unexpected parametric
variations that might otherwise be exhibited as field failures and warranty problems. Whereas traditional testing simulates
expected field environments and tests products within their expected operating range, HALT stimulates stresses
exceeding field environments and tests products beyond their expected operating range, significantly compressing the
time needed for testing. HALT performance evaluation usually takes 3–5 days, compared with traditional duration of
several months or years. For more accurate results one can use 15–25 days. Klyatis (1999, 58) offers the principles
for test parameters selection, which are used in our practice.
The test chamber uses thermocouple feedback for automatic control of unit under test (UUT) temperature. Based
on thermal survey data, the response of the item with the largest thermal mass will be used for this feedback control.
Depending on thermal mass, temperature step size, and rate of change (60°C/minute to +100°C/minute) stabilization
time may be 2–10 minutes.
Temperature rate of change has a significant effect on solder thermal stress characteristics and thus on the
response (strain and strain rate) at solder joints, especially of surface-mounted devices.
HALT is not a scoring event. The number of failures (or lack thereof) is not a measure of success for HALT. The
test objective is to demonstrate, with confidence, that the UUT will operate at environmental stress levels, which
exceed expected operating conditions.
Expected limits are the range of operating conditions of the equipment as mounted in the aircraft. This is derived
from aircraft and cooling air specifications or taken directly from compartment limits, as provided. Since UUTs will
have successfully passed Environmental Stress Screening (ESS), the probability of failure within expected limits is
very low. Redesign for any failure detected within expected limits is a must. Confidence limits are a design margin
beyond expected limits to account for any transient operating environmental conditions. Probability of failure increases
as environmental stresses increase. All failures will be analyzed to determine root cause. Redesign for failures detected
outside expected operating range would be evaluated based on cause of failure and proximity to confidence limits.
Step stress. During temperature step stress, the UUT will be powered and continuously monitored. Temperature
set point will be adjusted in discrete steps, dwelling at each step (after stabilization is confirmed by thermocouple
data) to verify UUT functionality.
Beginning at +20°C, temperature set point will be decreased by 10°C steps until lower operating limits are determined.
After a 10-minute dwell at each step, UUT functionality will be verified. Input voltage will be set at lowest
and highest specified limit and UUT functionality will again be verified for both settings.
After lower operating limit confidence margin has been demonstrated, step stressing may be aborted at the discretion
of the test director to avoid destruction of the UUT. If the operating limit confidence margin has not been
demonstrated, modifications may be made to the UUT as failures are encountered to increase these limits and
ruggedize the product. After the failure is corrected, testing will resume at one step less severe than the step at which
the failure occurred. If modifications cannot be made because the failure cannot be easily corrected, thermal barrier
material may be used so that the sensitive areas are kept at a higher temperature than the rest of the product while
cold step stressing continues.
Hot step stress. Beginning at +20°C, temperature set point will be increased by 10°C steps until upper operating
limits are determined. After a 10-minute dwell at each step, UUT functionality will be verified. Input voltage will be
set at lowest and highest specified limit and UUT functionality will be verified for both settings.
After upper operating limit confidence margin has been demonstrated, step stressing may be aborted at the discretion
of the test director to avoid destruction of the UUT. If the operating limit confidence margin has not been
demonstrated, modifications may be made to the UUT as failures are encountered to increase these limits and
ruggedize the product. After the failure is corrected, testing will resume at one step less severe than the step at which
the failure occurred. If modifications cannot be made because the failure cannot be easily corrected, thermal barrier
material may be used so that the sensitive areas are kept at a lower temperature than the rest of the product while hot
step stressing continues.
Rapid temperature transitions. During rapid temperature transitions, the UUT will be powered and continuously
monitored. Temperature set points, based on the operating limits determined during cold and hot step stress, will be
ramped as fast as the chamber will allow (at least 60°C/minute). Air temperature limits will be set to -90°C and +130°C
to prevent excessive overshoot. After UUT operating limits are confirmed by thermocouple data, UUT functionality
will be verified at lower and upper set points.
Five cycles of cold and hot ramps will be applied to the UUT. Modifications may be made to the UUT as failures
are encountered to ruggedize the product. After the failure is corrected, testing will resume at one cycle less than the
cycle at which the failure occurred. If modifications cannot be made because the failure cannot be easily corrected,
thermal barrier material may be used so that the sensitive areas are kept away from lower and upper set points while
rapid temperature transition continues.
Vibration step stress. During multi-axis vibration step stress, chamber temperature will be held at +20°C and
the UUT will be powered and continuously monitored. Vibration will be adjusted in discrete steps until operating limits
are determined. Vibration starting levels are 5 grms for equipment bay and cockpit mounted equipment and 2 grms
for pilot mounted equipment. Vibration step sizes are 5 grms for equipment bay and cockpit mounted equipment, 2
grms for pilot mounted equipment. Vibration desired operating limit confidence margins are: 30 grms for equipment
bay and cockpit mounted equipment and 10 grms for pilot mounted equipment
After operating limit confidence margin has been demonstrated, step stressing may be aborted at the discretion
of the test director to avoid destruction of the UUT. If the operating limit confidence margin has not been demonstrated,
modifications may be made to the UUT as failures are encountered to increase these limits and ruggedize the
product. After the failure is corrected, testing will resume at one step less severe than the step at which the failure
occurred. If modifications cannot be made because the failure cannot be easily corrected, epoxy may be used between
the body of the component and the board/product surface or between two adjacent components to help remove stress
off the leads of the component while vibration step stressing continues.
Combined environment. During combined environment step stress, the UUT will be powered and continuously
monitored. The UUT will be subjected to a combined environment of vibration and thermal stress with rapid temperature
transitions. Input voltage variation can be added as an additional test parameter.
Temperature set points, based on the operating limits determined during cold and hot step stress, will be ramped
as fast as the chamber will allow (at least 60°C/minute). Five minutes after UUT operating limits are confirmed by
thermocouple data, UUT functionality will be verified. Vibration stress (starting level as defined) will be applied for
five minutes and UUT functionality will again be verified. Vibration will be incremented after each subsequent thermal
cycle of the combined environment.
Extended environment. After operating limit confidence margin has been demonstrated, step stressing may be
aborted at the discretion of the test director to avoid destruction of the UUT. If the operating limit confidence margin
has not been demonstrated, modifications may be made to the UUT as failures are encountered to increase these limits
and ruggedize the product. After the failure is corrected, testing will resume at one step less severe than the step
at which the failure occurred. If modifications cannot be made because the failure cannot be easily corrected, epoxy
may be used between the body of the component and the board/product surface or between two adjacent components
to help remove stress off the leads of the component while vibration step stressing continues.
Failures. The test objective is to establish confidence that the fielded equipment design will perform successfully
by demonstrating that the UUT design will operate at environmental stress levels, which exceed expected operating
conditions. Failure is defined as UUT functional performance, which does not meet specified limits under specified
conditions. Failure includes structural breakage, fracture, or other damage, which causes the UUT to be non-operational.
Any test step, which indicates a failure, will be repeated to verify that the failure indication is repeatable. If
failure indication recurs, the event will be logged and tracked as a failure. Otherwise, the event will be logged and
tracked as an anomaly. All failures will be analyzed to determine and categorize the basic failure mechanism: design
related, part related, manufacturing process related, externally induced, or unknown. Analyses may include circuit
analysis, internal part analysis, or manufacturing process review, as appropriate.
The papers McLean (1998) and Palmer (1999) were used for analysis methodology of the results. McLean presented
methods to improve the analysis of multi-level stress tests. While the methods shown are approximate, they
easily lend themselves to analysis on a computer.
348 ASQ’s 54th Annual Quality Congress Proceedings
CONCLUSION
The method used allowed us to identify design and manufacturing deficiencies, allowing considerable savings of
time and money. The tests provided visual estimates over any range of stress and verified stress/performance relations.
It forced product maturity during design. The HALT process was started early in design stage by involving
design engineers. Determination of product limits was easy. The test determines stimuli and run step stress on toward
each product limit. When failure occurs, determines root cause and fixes it. By increasing the stress level and repeat
steps until fundamental limit of technology was found, the process progresses quickly achieving practical results. We
forced the problems to show up and then eliminated them.
The approach used allowed us to achieve low cost design verification, contributed to improve & finalize design.
One of the results was that qualification test units passed first time. The HALT contributed to eliminate hidden electronic
defects before shipping to the field.
REFERENCES
Klyatis, L. M. 1999. “Step-By-Step Accelerated Testing.” In Proceedings of the Annual Reliability and Maintainability
Symposium: 57–61.
Mclean, J. A. 1998. “Ways To Improve The Analysis Of Multi-Level Accelerated Life Testing.” Qual. Reliab. Engng.
Int. 14: 393–401.
Palmer, J. D. 1999. “Electronic-Module Environmental-Stress-Screening Data-Evaluation Technique.” In Proceedings
of the Annual Reliability and Maintainability Symposium: 50–54.
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