BALAJI VENKATARAMAN
Email: xbalaji@gmail.com Phone: 408-329-2973
OBJECTIVE
Aspiring for managerial position in the area of embedded systems,
Data Communications, Telecom & Networking that will both utilize
and strengthen my skills.
EDUCATION
Bachelor of Electronics & Communication engineering 1991-95 with
Distinction from University of Madras, INDIA.
OVERVIEW
Nearly 12 years of extensive experience in design, development and
testing of Real time embedded systems, Device drivers and Networking
Protocols using C, with more than 3.5 years of software project planning
and execution.
WORK STATUS
Authorized to work for any employer in the United States.
TECHNICAL EXPERIENCE
Programming Languages
C, PASCAL, FORTRAN, Basic, HTML, JavaScript, PERL, Java
Operating Systems
Linux, Fedora, UNIX SCO, Tornado 2.0, VxWorks - RTOS,
pSOS+ RTOS, Solaris, Cisco IOS, MS-DOS, TMO real time
OS Emulator
Software Tools
gcc, gdb, bash, tcsh, sed, awk, PERL, HTML, Expect, apache,
asterisk, tomcat, Clear case, DDTS, Tornado 2.0, GSOFT TR &
FR, Fedora tools, Solaris Open Windows, X-windows, KDE and
Microsoft Windows family
Protocols
LLC, SDLC, X.25, QLLC, PPP, SLIP, DHCP, RFC1490 SNA over FR,
FR, FRF.5, FRF.8, Knowledge of AAL1, AAL2, AAL5, IMA, Q.921,
Q.931, TCP/IP, Modem protocols.
Design Experience
Design and architect next generation PVDM based digital modems
using Mindspeed CSM V12 chipset for Cisco Access Routers.
HDLC driver using Infenion-3086 in Cisco IOS for BRI U, S/T WIC’s
and EM-BRI.
IMA driver using MXT-5100 in Cisco IOS for AIM-ATM.
Design ISDN PRI drivers with MPC860-MH, modem drivers with RC56CSM/2,
task architecture for Samsung’s SA-360 using pSOS
Design of X.25 switching & connectionless applications over X.25
for FastComm FRAD.
Familiar with
MXT5100 SAR chip, Infenion’s I3086, Siemens 2070, RTOS ISDN PRI using
MPC860 QMC, RC56CSM/2 modem drivers. Line Analyzers like Telenex Test
Systems Interview 8800 series, Feline Analyzer, Wandel & Goltermann
Inter network Analyzer, RADCOM analyzer, ABACUS traffic generator
Hardware
MXT5100, I3086, MPC860EN, MPC860MH, 68360EN, 68302, 80x86, Pentium,
8085, 8031, CSM V12, NiOS
Other information (unrelated to work)
Think out of the box and non-conventional solutions, I write numerous
toy programs, scripts to get the job done.
Host web server (apache), wiki (phpwiki), bulletin board (phpBB) at
home and run multiple domains (http://xbalaji.gotdns.com,
http://kural.no-ip.org ).
Run asterisk and use SIP to make voice calls, also support SABLE
(text to speech conversion, mark up language)
Maintain a personal genealogy website using GRAMPS.
Keep abreast with the technology (myspace, linkedin, etc...)
PROFESSIONAL EXPERIENCE Dec 1995 Till Date
1. Cisco Systems, San Jose Dec 1999 Till Date
* PON (Passive Optical Networking) Module May 2007 Till Date
* Metro Ethernet HWIC Module Jul 2007 Till Date
Product Hardware: N2G
Product Hardware: Cisco 28xx, 38xx ISRs, X-formers.
Role: Lead, Architect, Design and Develop
Responsibilities:
This project is in initial development stages going through PRD
discussions.
* NME-AIR-WLCx-K9 Wireless LAN May 2006 May 2007
Controller Network Module
Product Hardware: Cisco 28xx, 38xx ISRs
Role: Lead, coordinator
Responsibilities:
Co-ordinate software product development between WNBU and ATG, this is
a project jointly done between the two business units of Cisco. Primary
role is isolate issues during testing and assign the right resource for
fixing the defect.
* PVDMII-xxDM Next generation digital modems (II) May 2006 Jun 2006
For Cisco ISRs (28xx, 38xx)
Product Hardware: PVDMII-xxDM on Cisco 28xx, 38xx ISRs
Role: Lead, Architect, Design and Develop
Responsibilities:
Addition of new features like T1/E1 HWIC, CAS, Point of Sale, Modem
recovery
features to PVDMII-xxDM phase 1.
* PVDMII-xxDM Next generation digital modems (I) Jan 2004 Apr 2006
For Cisco ISRs (28xx, 38xx)
Product Hardware: PVDMII-xxDM on Cisco 28xx, 38xx ISRs
Role: Lead, Architect, Design and Develop
Responsibilities:
Architect the digital modem design based on PVDMs. Lead 4 engineers,
conference regular meetings with Mindspeed (CSM V12 vendor) and Altera
(NiOS & Cyclone FPGA). Develop the firmware for the NiOS soft processor
in the Cyclone FPGA.
* VNM Next generation Voice module for Jun 2002 Dec 2003
Cisco Integrated Service Routers (28xx, 38xx)
Product Hardware: Cisco 26xx, 36xx next generation
Role: Designer, Developer and Tester
Responsibilities:
Device driver development for next generation voice module. Writing the
Overall System Functional Specification for the module identify hardware,
chipsets and lead the project.
* WIC ISDN-BRI-ST-V2 for Cisco 2600, 3620, Feb 2002 Jun 2002
3640, 3660, 2691, 3725, 3745 series routers
Product Hardware: Cisco 26xx, 36xx, 37xx routers
Role: Designer, Developer and Tester
Responsibilities:
Device driver development for EOL part replacement of Siemens ISDN ST chip
set with Infenion 3086 chipset. Coordinate with 16xx, 17xx Business Unit
and lead the project.
* WIC ISDN-BRI-U-V2 for Cisco 1600, 1700, May 2001 Mar 2002
2600, 269x, 3620, 3640, 3660, 3725, 3745 series routers
Product Hardware: Cisco 16xx, 17xx, 26xx, 36xx, 37xx routers
Role: Designer, Developer and Tester
Responsibilities:
Device driver development for EOL part replacement of Siemens 2070 HDLC
controller in ISDN-BRI-U interface with Infenion 3086 chipset. HDLC device
driver design and implementation for 3086 chipset for Cisco 2600, 36xx
platforms. Worked for cross BU integration and lead the project.
* AIM ATM for Cisco 26xx and 3660 Dec 1999 May 2001
Product Hardware: Cisco 3600 router MIPS 4K
Role: Designer, Developer and Tester
Responsibilities:
Device driver and implementation for IMA, AAL2 SAR (Phase II) of AIM in
Cisco36xx/26xx series. Handle customer issues, with alpha and beta testing,
bug fixing in phase I of the project, which involves ATM, interfaces only.
Study of IMA, AAL2 and fixing of bugs in existing 36xx products.
2. Future Communications Software, San Jose May 1999 Dec 1999
* CAMPIO Communications, Milpitas, CA May 1999 Dec 1999
Hardware: Board with MPC860T processor & x 86 boards
Campio proprietary hardware
O/S: Tornado 2.0 VxWorks RTOS & Linux
Role: Designer, Developer and Tester
Responsibilities:
Design of task architecture in the one of the boards COM. Design of
proprietary interactive protocol mechanism between boards. Coding of
the tasks and the protocol mechanism. High level design of Board
support package BSP and device drivers for the third party plug-in cards.
3. Future Software, India Feb 1996 May 1999
* AIReach Broadband Network System (Hughes, USA) Mar 1999 May 1999
Hardware: Hughes Network systems proprietary
Role: System Test Designer and Tester
Responsibilities:
Design different topologies for system testing. Design and develop frame
relay specific tests for the ABN system. Reviewer of test cases developed
for CES and ATM services.
* Remote Access Server, Samsung, South Korea Sep 1998 Feb 1999
Hardware: Multiple board chassis with MPC860 MH&EN processors,
Samsung proprietary hardware.
O/S: pSOS+ RTOS
Role: Designer, Developer and Tester
Responsibilities:
* Digital Modem Pool Assembly DPA Mar 1998 Sep 1998
Design, coding & testing of RC56CSM/2 modem drivers for the embedded
system. Porting & Testing of PPP and SLIP for the DPA board. The driver
was developed and later tested in Samsung Electronics Lab, Seoul in
four months.
* ISDN PRI Assembly IPEA Sep 1997 Mar 1998
Design & Coding of ISDN PRI driver for the QMC chip MPC860MH. Responsible
for the build system and make file organization of the entire RAS system.
For Design discussions had been to customer site for a period of 4 weeks.
* SNA-QLLC/X.25, X.25 & Annex G Switching and Feb 1997 Sep 1997
RFC 1356, FastComm Communications, Sterling, VA
Hardware: Motorola 68302, Fastcomm proprietary hardware.
Role: Module Lead - Designer, Developer and Tester
Responsibilities:
Design, Coding, Testing of X.25 Switching and Application manager module.
Porting & Testing of Future X.25 to Fastcomm environment.
Implementation of RFC 1356 & Annex G Switching
Responsibilities:
Design, Coding & testing of X.25 Transparent Connection Handler for
Fastcomm environment. Design & Testing of Annex G switching. Switching
between X.25 and Annex G.
* SNA over Frame Relay - RFC 1490, FastComm, VA Sep 1996 Feb 1997
Hardware: Motorola 68302, Fastcomm proprietary hardware.
Role: Designer, Developer and Tester
Responsibilities:
Porting & testing of Future LLC2 to Fastcomm s environment, Design &
Testing of Token Ring Cache, SNA switching.
* Future LLC Jun 1996 Sep 1996
Client: Future Software Product
Hardware: IBM-PC
O/S: Developed in Linux and tested in Future Software
proprietary RTOS simulator TMO.
Language(s): C
Role: Designer, Developer and Tester
Responsibilities: Design, Coding, Testing of Future LLC2 1987 std.
compliant.
* Graduate Engineer Trainee, Future Software Feb 1996 Jun 1996
Project: UNDELETE
Client: Future Software Product
Hardware: IBM-PC
O/S: Linux 1.2.1
Language(s): C
Role: Designer, Developer and Tester
Responsibilities: Design, Coding & testing.
4. Council of Scientific and Industrial Research Dec 1995 Feb 1996
CSIR-SERC, Madras, INDIA
Responsibilities:
Worked as project assistant, assisting scientists in experimental setup,
data acquisition, and conversion to analog recordings to digital data.
Academic Projects
Data Compression & Data Encryption, UNIX Man Page, Command Interpreter
Static Drive for AC Machines Hardware: Period Dec 1994 - Feb 1995 (Engg.)
Additional Information
o Member of IEEE, ISTE, IETE during the years 1991- 1995.
o Passed a Certificate course in Radio & Tape Recorder Maintenance.
References:
Available upon request.