Classic CPU pins:
The following are descriptions of most of the pins on some classic
microprocessor chips. After the descriptions are listed the chips which use
those lines.
Every classic chip has a series of pins labeled with letter As and letter Ds,
followed by a number. These pins constitute the address and data buses.
In addition, there are 4 power-supply pins in common use:
Vss: Ground (8080A, Z80, and 6502)
Vbb: -5 V (8080A)
Vcc: +5 V (8080A, Z80, and 6502)
Vdd: +12 V (8080A)
The rest of the pins are as follows:
RESET: (Input) Reset CPU. Most CPUs must be reset when they are powered on to
bring them to a known state. In addition, the RESET line must be kept
active for a particular number of cycles. Although the exact number varies
from CPU to CPU, in general, keeping it active for one or two full seconds
should be enough. (8080A and Z80) (RES on the 6502)
HOLD: (Input) Main processor hold; The CPU will stop, send out a HLDA singal,
and release the address and data buses; Then it will stop operation until
HOLD goes inactive again. (8080A)
INT or IRQ: (Input) Interrupt request. Before an interrupt request can be
complied with, the CPU will first finish the current instruction. Then, if
the interrupt mask bit is not set (which disables interrupts), then an
interrupt will begin. The CPU turns on the interrupt mask bit so no further
interrupts occur until the current one is over, and then an interrupt
acknowledge signal is sent out. This pin is usually active-low. (On the
6502, the IRQ and NMI pins require 3Kohm pull-up resistors.) (INT on the
8080A and Z80) (IRQ on the 6502)
NMI: (Input) Non-Maskable Interrupt. Works similarly to IRQ, except that it
will take place even if the interrupt mask bit is on. This pin is usually
active-low. (On the 6502, the IRQ and NMI pins require 3Kohm pull-up
resistors.) (Z80 and 6502)
CLK: Clock lines. (Often, a Greek phi symbol is used to represent these clock
lines.) A CPU only needs three things to REALLY function: Electrical power,
memory (either RAM or ROM), and an oscillator clock signal. Of these three,
the clock signal is where many people trip up; Rest assured, the clock
input is necessary for a CPU to function properly. All major CPUs require
the clock input to regulate their own internal cycle rate. You can actually
control how fast the CPU runs by changing the rate of the clock input it
receives (this is why overclocking is possible). A simple way (in fact, the
only precise and widely-used way) to provide this oscillating clock input
is with a crystal oscillator. The 8080A chip typically uses a 16 MHz
crystal oscillator, although it uses a 2 MHz, 2-phase, non-overlapping
clock. (An 8224 clock generator/driver is often used to control the 8080A's
clock input.) The 6502 usually uses a 1 MHz input, although it can
theoretically handle one up to 4 MHz. Also, there is a version of the 6502
called the 6502AP which is made for a 2 MHz clock input. Minimum clock rate
for the 6502 ranges from 50 KHz to 500 KHz, depending on who you ask. The
Z80 generally uses a 2.5 MHz clock input, but it can run at much lower
clock speeds because it was the only major CPU in history which did not use
dynamic registers. (8080A, Z80, and 6502)
INTA or INTE: (Output) Interrupt acknowledge. (8080A)
DBIN or R/W: Data Bus INput; When 1, CPU is receiving data; When 0, CPU is
sending. (DBIN on the 8080A) (R/W on the 6502)
WAIT: (Input) Wait state, for slow peripherals; WAIT will make the CPU pause
for as long as the WAIT signal is active. (8080A and Z80)
WR: (Output) Write; Indicates that the data on the data bus is to be written
to the current address bus setting. (8080A and Z80)
RD: (Output) Read; Indicates that the data at the current address bus setting
is to be placed on the data bus. (Z80)
READY: (Input) Indicates the peripheral is ready to send or receive data.
(8080A) (RDY on the 6502)
SYNC: (Output) Signifies when a new instruction begins. Equivalent to M1 on
the Z80. (8080A and 6502)
HLDA: Hold Acknowledge. (8080A)
M1: (Output) Indicates that the memory byte which the CPU is currently
accessing is the first byte of an instruction. Many CPU instructions are
several bytes long, but M1 will only be active when the CPU is accessing
the first one. This is actually the Z80's equivalent of the SYNC pin. (Z80)
SO: (Input) Set Overflow. Sets the overflow flag. (6502)
NC: Not Connected. Any pins marked "NC" are non-functional.
(Many of these signals are written with a horizontal line over them; This
line indicates that the signal is "active low", meaning that when it is set
to 0, that's an activation signal to do something. The line is also sometimes
called a "NOT" line, because it indicates that that line actually does NOT
perform the named function when it is high.)
Pins on a chip are normally numbered as follows: Begin by placing the chip
so that the notch is at the top. (The 8080A, 6502, and Z80 all have a
semi-circular notch carved into one side for orientation.) Once this notch is
at the top, pin 1 is the one in the upper-left corner. From there, move
downwards, numbering each pin in succession. On a 40-pin chip, the lower-left
corner pin is pin 20. From there, move to the right hand side, making the
lower-right pin number 21, and then move upward, numbering each pin until you
reach the upper-right (and final) pin, which on a 40-pin chip is obviously
pin 40. (The 8080A, 6502, and Z80 are all 40-pin chips.)
Pinouts for these three classic CPUs are as follows. A slash preceding the
pin name indicates that the pin is active-low. (For example, /NMI means NMI
is active-low.)
8080A:
1: A10
2: Vss (Ground)
3: D4
4: D5
5: D6
6: D7
7: D3
8: D2
9: D1
10: D0
11: Vbb
12: RESET
13: HOLD
14: INT
15: CLK2
16: INTE
17: DBIN
18: /WR
19: SYNC
20: Vcc (+5V)
21: HLDA
22: CLK1
23: READY
24: WAIT
25: A0
26: A1
27: A2
28: Vdd
29: A3
30: A4
31: A5
32: A6
33: A7
34: A8
35: A9
36: A15
37: A12
38: A13
39: A14
40: A11
6502:
1: Vss (Ground)
2: RDY
3: CLK1 (Out)
4: /IRQ
5: NC (Not Connected)
6: /NMI
7: SYNC
8: Vcc (+5V)
9: A0
10: A1
11: A2
12: A3
13: A4
14: A5
15: A6
16: A7
17: A8
18: A9
19: A10
20: A11
21: Vss (Ground)
22: A12
23: A13
24: A14
25: A15
26: D7
27: D6
28: D5
29: D4
30: D3
31: D2
32: D1
33: D0
34: R/W
35: NC (Not Connected)
36: NC (Not Connected)
37: CLK0 (In)
38: SO
39: CLK2 (Out)
40: /RES
Z80:
1: A11
2: A12
3: A13
4: A14
5: A15
6: CLK
7: D4
8: D3
9: D5
10: D6
11: Vcc (+5V)
12: D2
13: D7
14: D0
15: D1
16: /INT
17: /NMI
18: /HALT
19: /MREQ
20: /IORQ
21: /RD
22: /WR
23: /BUSAK
24: /WAIT
25: /BUSRQ
26: /RESET
27: /M1
28: /RFSH
29: Vss (Ground)
30: A0
31: A1
32: A2
33: A3
34: A4
35: A5
36: A6
37: A7
38: A8
39: A9
40: A10
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