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Objective
University of Florida Graduated with Honors GPA 3.46
Designed, tested and implemented video processing boards for the company's "888" digital color corrector. The 888 system dominates the world's color correction market with 80 percent market share. At the beginning of the project all boards consisted mainly of discreet components and many small programmable logic devices (PLD) such as 22V10s. Near the end of the project field programmable gate arrays (FPGA) started being used and eventually replaced all of the discreet adders and multipliers on the real-time image processing boards. During this time all of the design tools were on the PC running under DOS or windows 3.11. For net list generation and data path FPGA design da Vinci used OrCad schematic capture. For PLD and FPGA state machine design ABEL from dataIO was used. All of these tools seemed to adequate at the time but there was no attempt at board or FPGA simulation. I also instructed the da Vinci engineering class that taught chief
engineers at post production facilities from all over the world how to
diagnose and repair the 888 color corrector. The class was taught
twice a year and usually had 10-20 people and lasted 5 days.
I left da Vinci Systems to become a partner in a new startup called
atLightSpeed, Inc. Here I designed a reconfigurable hardware
accelerator using Lucent Orca FPGAs. The board plugged into a Silicon
Graphics Indigo 2 workstation's GIO64 bus. The company developed 15
designs that accelerated certain image processing algorithms upto 200
times over software. Each design used the same board but just
reconfigured the FPGAs differently. We used VHDL for board level
simulation and synthesis. Our synthesis and place-and-route tools ran
on Sun servers and our simulator ran in Windows NT. I coordinated the
integration of the two platforms so our engineers could utilize the
benefits of both systems such as revision control system (RCS). I
developed many designs and managed even more. All in all, atLightSpeed
developed over 150 FPGA designs most running at 33 MHz in 90-100%
utilized parts.
Here I was involved in the design of a HDTV color corrector, "2k" with my former employer da Vinci Systems. I implemented the same tool set as atLightspeed except this time using Xilinx's M1 tools and Exemplar's Gallileo Extreme. In addition I wrote many perl tools to turn Orcad's VHDL net list into something that is usable under board level simulation. The design that was completed was the output board for the system which utilizes Xilinx 9500 and 4000XL devices running at 74.25 MHz system speeds.
Here at Esperan, a Cadence owned company, I've mostly taught basic 5 day VHDL courses. Occasionally I'll teach a 2 day verification seminar or a 3 day introduction to Perl class. Teaching is extremely satisfying and it's a great way to see the world. During my teaching which occurs every 5-6 weeks my wife and I have had a chance to meet a great number of interesting people see all kinds of beautiful sites.
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