DC2004, Chapter 4 Errata and Remarks

An alternative to the motherboard architecture is the passive back plane architecture.  The passive back plane approach has a back plane with no active components.  All active components are on circuit cards. The purpose of this approach is to permit exchange of components easily to very quickly restore the computer to service.  The passive back plane approach is superior for applications where equipment down-time is expensive or places lives or critical resources at risk, such as in an industrial or military operational environment.  When a failure occurs, cards are quickly replaced until the unit resumes working properly.  The extracted cards are then taken to a workbench for further testing.  Good cards are returned to the set of ready spares.  Bad cards are further tested and repaired or sent to another facility for repair or replacement.  This strategy also reduces the amount of training needed by the front-line technician to restore the unit to working order quickly.

Correction:  The text's "machine cycle" should be called "instruction cycle".  A "machine cycle" is the same as "clock cycle".

Central Processing Units (CPU) have a CPU clock which transmits pulses to synchronize operation of logic circuitry in the CPU and associated circuits.  On large computers, different major components may have their own clocks.  Communication between such major components is done asynchronously.  On small computers, such as a microprocessor (Personal Computer, Apple MacIntosh computers, etc), a single clock is used for the complete system and is called the system clock.  The time difference between the beginning of clock pulses is called the clock cycle time or machine cycle.

An instruction cycle is composed of the individual steps or stages needed to execute a specific instruction.  The complexity of the instruction determines the number of stages and the number of clock cycles needed to complete that instruction.  A simple transfer of data from one register to another register might take only 2 clock cycles.  For the 8086 processor, even simple integer signed multiplication or division involving a 16-bit register takes more than 160 clock cycles.

Some processors implement its instruction set by use of a much faster processor that interprets a machine language instruction as a sequence of microinstructions.  These microinstructions are called microcode. This reduces the complexity of the hardware and permits adding or changing machine language instructions without changing the hardware.  The IBM 360 is the first major example of using this type of architecture. The code used to program a microprocessor is not necessarily microcode. Processors are programmed. Programs are stored.

An alternate approach is to use microcode to set logic gates to actually alter the circuitry for the electronic execution of the instruction.

An advanced hardware and interpreter implementation can lead to pipelining, superscalar processing, and hyperthreading.

It is possible to store microcode in a Programmable Read Only Memory (PROM). The mere fact that code is stored in a PROM does not make that code "microcode". The mere fact that a microprocessor executes code does not make that code "microcode".

In the example of this question, the code is stored in a Programmable Read Only Memory (PROM). Calling a ROM "Programmable" merely means its contents can be established after the ROM has been manufactured. This involved use of a device, often called a "Programmer". The PROM does not care what is stored, instructions or data. The PROM does not execute anything.

The proper name of USB-2 is Hi-Speed USB.  See http://www.usb.org

FireWire was the Apple name.  IEEE subsequently assigned it to an IEEE Standard.  This is now (and still) called the IEEE 1394 port.