EXPERIENCE
Jun 1992
to
Present
INTEL Corporation, Santa Clara, CA/Hillsboro, OR/Chandler, AZ/PlainsboroNJ
Staff Software Engineer/Technical Content Owner. 3D Graphics - Microprocessor Graphics Lab
Lead development of OpenGL technology implementation and optimization of the geometry pipeline on Intel Architecture platforms, staffed by a team of 12 engineers in Russia. Responisble for project management, planning, and communication (using fluency in Russian). Represent Intel on the OpenGL Architecture Review Board. Reviewed OpenGL Programming for Windows95/NT, Addison Wesley 1996. Participated in task force to define future processors for optimal 3D performance.
Senior Software Engineer. Video Algorithms - Media Architecture
Lab
Worked on site at Compression Labs, Inc. as Indeo expert to help port
algorithm to IIT/8x8's VCP (SIMD video processor). Became Intel expert
on VCP, maintained flowing communication to Intel to make sure project
proceeds as planned. Assisted VTEL in using deliverables of project. Wrote
microcode on i750PE for ISDN rate Indeo implementation.
Responsible for prototype programming tools for i750PE/PB+ video processors. Designed Instruction Set Architecture software model in C++, hired and supervised 2 co-ops on project. Utilized many object-oriented techniques; taught C++ class. Worked with external consultant in the performance evaluation of audio on PB+; developed several microcode optimization techniques. Programmed, debugged, and supported software simulator for V3 high-end viode processor.
to
Sep 1991
Learned principles of Digital Video Interactive Technology, i750PB/DB pixel and display processors, ActionMedia II video boards, NTSC standards. Independently designed hardware interface and programmed VGA and DVI board registers to genlock and key VGA text and graphics over DVI full motion video on LCD. Played major role in completion of power-on self test for ActionMedia II. Supervised technician during testing. Specified and coded board setup program; delivered in three weeks.
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Sep 1990
UNISYS Corporation, Malvern, PA
Junior Engineer. FDDI Development
Learned all aspects of Intel's 80960CA RISC-based processor. Developed DMA and interrupt kernel support for FDDI board. Specified and coded DMA Manager software module. Ran performance tests on evaluation board; proposed method to increase data throughput; used logic analyzer. Interfaced with vendor to resolve beta release bugs.
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Sep 1989
AT&T BELL LABORATORIES, Middletown, NJ
Technical Analyst. Computer Networking Lab - Hardware Systems Test Team
Acquired familiarity with LAN components and UNIX. Completed independent project to enable two StarLAN NAUs to transmit and receive frames in single host; doubled testing productivity; documented results. Wrote automated Paradox database scripts; reduced two days of work monthly to few keystrokes. Received Golden Floppy Award.
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Jan 1990
Chief Programmer.
Responsible for all software development, maintenance and testing. Completed development cycle of custom data logger. Worked on digital imaging project. Wrote EGA support, optimizations for Ultrasonic Data Analysis software. Provided phone technical support. Demonstrated products to customers.
Sinphony