VHDL stands for VHSIC hardware description language. VHSIC is also abbreviation for very high speed integrated circuit.  VHDL is used to describe the behavior, structure and implementation of electronics systems. Basically it is a CAD tool. The most important thing about VHDL is that it is a parallel  language means that it has no sequential flow like software languages. The other important difference with software languages is that it allows use of explicit time delays.

Please consult the following links for further information.

 

The HDL Page 
The VHDL First Page 
VHDL Tutorial for Beginners(1)
Gerd's VHDL Tutorial for Beginrers(2)
Green Mountain VHDL  Tutorial(3)
VHDL and Verlog References and Tutorials(4)
The Australian Designer's FPGA/VHDL Home Page
The Duct Tape VHDL Guide
The VHDL Examples
Web Resources on VHDL
The VHDL:  From Simulation to Synthesis
The VHDL Cookbook
The Hamburg VHDL Archive
The VHDL Resource Page
The VHDL Examples for Synthesis
The FPGA Synthesis at Duke
The VHDL Quick Reference Guide
Synopsys
Xilinix
VHDL Synthesis Tutoria