Publications

Papers accept for publication

Journal papers

Symposium and Conference papers

Monographs

Patents

Technical report

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Papers accept for publication

  1. ABRÃO, Taufik; JESZENSKY, Paul Jean E. Performance of Multistage Interference Cancellers Combined with MC Multirate Transmission Schemes in Asynchronous AWGN and Flat Rayleigh Channels. Journal of Communications And Networks, Coreia, 2004.

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Journal papers

  1.  DIAS NETO, Fernando Ciriaco; ABRÃO, Taufik; JESZENSKY, Paul Jean E. Análise De Desempenho De Detectores Multi-Usuários Lineares Para Sistemas DS-CDMA. Semina, 2004.

  2. DIAS NETO, Fernando Ciriaco; ABRÃO, Taufik; JESZENSKY, Paul Jean E. DETECÇÃO MULTIUSUÁRIO UTILIZANDO ALGORITMOS HEURÍSTICOS EVOLUCIONÁRIOS E DE BUSCA LOCAL. Semina,  Londrina, 2004.

  3. KURAMOTO, André Seichi Ribeiro; ABRÃO, Taufik; JESZENSKY, Paul Jean E. SET OF SEQUENCES FOR QS-CDMA SYSTEMS WITH MULTI-USER DETECTION AND MULTIPATH-FADING CHANNELS. Wireless Personal Communications, Netherlands, 2004.

  4. STANCANELLI, Elvis Miguel Galeas; ABRÃO, Taufik; JESZENSKY, Paul Jean E. Descorrelacionador para Sistemas DS-CDMA em Canal Seletivo em Frequência. Revista do Instituto Nacional de Telecomunicações - INATEL, Brasil, v. 06, n. Junho, p. 37-48, 2003.

  5. ANGÉLICO, Bruno A.; ABRÃO, Taufik; JESZENSKY, Paul Jean E. Desempenho de Um Sistema MC-CDMA em Canal com Desvanecimentos Rayleigh Correlacionados na Freqüência. TELECOMUNICAÇÕES - Revista Científica Periódica do Inatel, Santa Rita do Sapucaí, MG, v. 06, n. Dezembro, p. 32-41, 2003.

  6. STANCANELLI, E. M. G.; ABRÃO, T. and JESZENSKY, P. J. E. Decorelator for DS-CDMA System over Multipath Channel,  Revista Telecomunicações - Inatel, August. 2003,  Brasil. (in Portuguese)

  7. KURAMOTO, A. R. S.; ABRÃO, T. and JESZENSKY, P. J. E.  "Comparision of Spreading Sequences Applied to QS-CDMA Systems" Revista SEMINA, UEL, Dec. 2002,  Brasil. (in Portuguese). 

  8. ABRÃO, T. and JESZENSKY, P. J. E. "Multiuser Detectors for DS/CDMA - Linear" Revista da Sociedade Brasileira de Telecomunicações, SBrT, vol16, Dec. 2001, p.  . Brasil. (in Portuguese)

  9. ABRÃO, T. and JESZENSKY, P. J. E. "Multiuser Detectors for DS/CDMA - Interference Cancellation," Revista da Sociedade Brasileira de Telecomunicações, SBrT, vol16, Dec. 2001, p.  . Brasil. (in Portuguese)

  10. ABRÃO, T.; CORRERA, F. S.  "A 2.488 Gb/s 1:4/1:16 Demultiplexer: an Experience on the Design of High-Speed Digital GaAs IC's".  Journal of Solid State Devices and Circuits  São Paulo: , v.1, p.24 - 31, 1996.

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Symposium and Conference papers

  1. DIAS NETO, Fernando Ciriaco; ABRÃO, Taufik; JESZENSKY, Paul Jean E. ALGORITMOS HEURÍSTICOS EVOLUCIONÁRIOS APLICADOS À DETECÇÃO MULTIUSUÁRIO DS-CDMA. In: SIMPÓSIO BRASILEIRO DE TELECOMUNICAÇÕES, 2004, Belém. XXI SIMPÓSIO BRASILEIRO DE TELECOMUNICAÇÕES-SBT'04, 06- 09 DE SETEMBRO DE 2004. 2004.

  2. GAZZONI FILHO, Décio Luiz; ABRÃO, Taufik. Demonstrações Distribuídas de Caráter Primo de Larga Escala. In: SIMPÓSIO BRASILEIRO DE TELECOMUNICAÇÕES, 2004, Belém. XXI SIMPÓSIO BRASILEIRO DE TELECOMUNICAÇÕES-SBT'04, 06- 09 DE SETEMBRO DE 2004. 2004.

  3. DIAS NETO, Fernando Ciriaco; ABRÃO, Taufik; JESZENSKY, Paul Jean E. Evolutionary Programming with Cloning and Adaptive Cost Function Applied To Multi-User Ds-Cdma Systems. In: ISSSTA 2004, 2004, Sidney. IEEE International Symposium on Spread Spectrum Techniques and Applications. 2004.

  4. KURAMOTO, André Seichi R.; JESZENSKY, Paul Jean E; ABRÃO, Taufik. Projeto de Seqüências para Sistemas QS-CDMA Multitaxa MPG. In: SIMPÓSIO BRASILEIRO DE TELECOMUNICAÇÕES, XXI SIMPÓSIO BRASILEIRO DE TELECOMUNICAÇÕES-SBT'04, 06- 09 DE SETEMBRO DE 2004.

  5. KURAMOTO, André Seichi Ribeiro; ABRÃO, Taufik; JESZENSKY, Paul Jean E. Sets of Sequences for QS-CDMA Systems with Interference Cancellation over Multipath Rayleigh Fading Channels. In: ISSSTA 2004, 2004, Sidney. IEEE International Symposium on Spread Spectrum Techniques and Applications. 2004.

  6. GROSS, Tadeu Junior; JESZENSKY, Paul Jean E; ABRÃO, Taufik. Sistema Dinâmico Estocástico de Tempo Discreto Não-Linear para Controle de Potência do Canal Reverso DS-CDMA. In: SIMPÓSIO BRASILEIRO DE TELECOMUNICAÇÕES, 2004, Belém. XXI SIMPÓSIO BRASILEIRO DE TELECOMUNICAÇÕES-SBT'04, 06- 09 DE SETEMBRO DE 2004. 2004.

  7. ANGÉLICO, Bruno A.; JESZENSKY, Paul Jean E; ABRÃO, Taufik. Sistema MC-CDMA com Cancelamento de Interferência Paralelo e Desvanecimentos Correlacionados na Freqüência. In: SIMPÓSIO BRASILEIRO DE TELECOMUNICAÇÕES, 2004, Belém. XXI SIMPÓSIO BRASILEIRO DE TELECOMUNICAÇÕES-SBT'04, 06- 09 DE SETEMBRO DE 2004.

  8. ABRÃO, Taufik; KURAMOTO, André Seichi R.; JESZENSKY, Paul Jean E. Spreading Sequences Comparison for QS-CDMA Systems. In: ISSSTA, 2004, Sidney. IEEE International Symposium on Spread Spectrum Techniques and Applications. 2004.

  9. SILVA, Vanderlei A; ABRÃO, Taufik; JESZENSKY, Paul Jean E. Statistically Correct Simulation Models for the Generation of Multiple Uncorrelated Rayleigh Fading Waveforms. In: ISSSTA, 2004, Sidney. IEEE International Symposium on Spread Spectrum Techniques and Applications. 2004.

  10. KURAMOTO, André Seichi Ribeiro; ABRÃO, Taufik; JESZENSKY, Paul Jean E. Conjuntos de Seqüências para Sistemas QS-CDMA com Deteção Multiusuário Sujeitos a Desvanecimento Multipercurso. In: XX SIMPÓSIO BRASILEIRO DE TELECOMUNICAÇÕES (SBT’03), 2003, Rio de Janeiro. XX Simpósio Brasileiro de Telecomunicações (SBT’03) - 20 anos de SBrT e o Futuro das Telecomunicações no Brasil. 2003.

  11. STANCANELLI, Elvis Miguel Galeas; ABRÃO, Taufik; JESZENSKY, Paul Jean E. Descorrelacionador Aliado à Diversidade de Percursos. In: XX SIMPÓSIO BRASILEIRO DE TELECOMUNICAÇÕES (SBT’03), 2003, Rio de Janeiro. XX Simpósio Brasileiro de Telecomunicações (SBT’03) - 20 anos de SBrT e o Futuro das Telecomunicações no Brasil - 05 a 08 outubro Hotel Glória. 2003.

  12. JESZENSKY, P. J. E. and ABRÃO, T. "Novel Serial Group Interference Canceller Scheme for Asynchronous Multirate DS-CDMA Systems"  PIMRC 2002 - The 13th IEEE International Symposium on Personal, Indoor, and Mobile Radio Communications September 15-18, 2002, Lisbon, Portugal.

  13. ABRÃO, T. and JESZENSKY, P. J. E "Successive Parallel Interference Canceller for Asynchronous Multirate DS-CDMA Systems"  PIMRC 2002 - The 13th IEEE International Symposium on Personal, Indoor, and Mobile Radio Communications,  September 15-18, 2002, Lisbon, Portugal.

  14. JESZENSKY, P. J. E. and ABRÃO, T.  "A Parallel Interfence Canceller for Multirate DS-CDMA System"  ITS 2002 - International Telecommunications Symposium, September 8-12, 2002, Natal, RN, Brazil.

  15. ABRÃO, T. and JESZENSKY, P. J. E "Multistage Hybrid Interfence Canceller for Asynchronous Multirate DS-CDMA System in AWGN and Flat Rayleigh Channels"  ISSSTA 2002 - IEEE 7th International Symposium on Spread Spectrum Techniques and Applications, September 2-5, 2002, Prague, Czech Republic.

  16. JESZENSKY, P. J. E. and ABRÃO, T.  "Multistage Parallel Interfence Canceller for Asynchronous Multirate DS-CDMA System in AWGN and Flat Rayleigh Channels"  ISSSTA 2002 - IEEE 7th International Symposium on Spread Spectrum Techniques and Applications, September 2-5, 2002, Prague, Czech Republic.

  17. Silva, V. A.; Abrão  T. and Jeszensky. J. E "A New Computer Generated Multipath Rayleigh Fading Channel Simulator" (resume; slides) 12th Annual MPRG/Virginia Tech Symposium on Wireless Personal.  Blacksburg, VA, USA, 2002.

  18. ABRÃO, T. and JESZENSKY, P. J. E. "Multistage Parallel Interference Cancellation Performance with Hard and Soft Decision"  19o. Congresso Brasileiro de Telecomunicações, SBT, 2001, 03-06 Sept, Fortaleza, BR. (in Portuguese).

  19. SAITO, M, LEITE, J. R., SEABRA, A. C., CORRERA, F., INOKI, C. K, ABRÃO, T.  Submicron Gate FET Tecnology Development  Applied to High Speed Digital Integrated Circuit Project and Implementation. In: Seminário de Avaliação PADCT/FINEP - Subprograma de Novos Materiais, 1996, Águas de Lindóia. (in Portuguese).

  20. FINARDI, C. A, FISCHER, R. A, CORSO, V, NETO, V. P, VERRI, A. S, D, V. J., CONSONI, D, CORRERA, F. S, LEE, H. K, LUQUEZE, M. A., ABRÃO, T.   "GaAs MMIC Technology Developments at TELEBRÁS"   VII Simpósio de Microondas e Optoeletrônica & XIV Simpósio Brasileiro de Telecomunicações (Telemo), 1996, Curitiba. (in Portuguese)

  21. ABRÃO, T., CORRERA, F. S.   "A 2.488 Gb/s GaAs 1:4/1:16 Demultiplexer IC with Skip Circuit for SONET STS-12/48 Systems" In: 1995 SBMO/IEEE MTT-S International Microwave and Optoeletronics Conference, 1995, Rio de Janeiro.1995. v.1. p.58 - 62

  22. FINARDI, C., FISCHER, R. A., CORSO, V., NETO, V. P., VERRI, A. S, VIVEIROS JR, D, CONSONI, D, CORRERA, F. S, LEE, H. K, LUQUEZE, M. A., ABRÃO, T.   "Gallium Arsenide Integrated Circuits Development at Telebrás In: X Congress of the Brasilian Microelectronics Society & I Ibero American Microelectronics Conference, 1995, Rio de Janeiro.1995. p.205 - 212

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Monographs

  1. ABRÃO, T. Interference Cancellation applied to DS/CDMA Systems of Multiple Rate, PhD Thesis, (in Portuguese). São Paulo, Feb/2001    
    Full size Download: 11.1M); or by parts: contents (size: 144K), chapter 1 (size: 152K), chapter 2 (size: 3.82M), chapter 3 (size: 1.76M), chapter 4 (size: 1.45M), chapter 5 (size: 3.17M), chapter 6 (size: 28K), annex (size: 5.13M), references (size: 63K),

  2. Abstract: This work was accomplished concomitant with the standardization process for third generation mobile systems (3G). That being so naturally the investigation universe includes Multi-user Detection (MuD) in conjunction with multirate schemes seeking to assist in na eficient way the different demands of services in 3G mobile systems. This work investigates new MuD structures for mobile DS-CDMA (Direct Sequence-Code Division Multiple Access) communication systems in AWGN (Additive White Gaussian Noise) and flat fading Rayleigh channels combining no linear Interference Cancellers (IC) to two types of multirate access schemes: Multiple Processing Gain (MPG) and Multiple Codes (MC). The original contributions of this work related to new MuD structures for high capacity acting in a multirate scenario can be synthesized as: a) Proposal and performance determination for five new MuD structures based on multistage parallel and hybrid interference cancellation schemes which detect DS-CDMA signals with different information rates; b) Development of an analytical model for multistage Parallel Interference Cancellers (PIC) performance determination with hard and Tanh decision detectors in AWGN and flat fading Rayleigh channels; c) Comparison of linear and no linear decision detectors for multistage PIC based receivers in a single rate scenario in AWGN and flat fading Rayleigh channels from extensive Monte Carlo simulation.

     

  3. ABRÃO, TGaAs High Speed Digital Integrated Circuits: 1 to 16 Channels Demux in 2,5 Gb/s.  Master of Science Thesis.  (in Portuguese). São Paulo, Marh/1996

  4. Prize for the best dissertation of MSc of the Polytechnic School of USP, (EPUSP) concluded in the year of 1996. (UNIBANCO Academical Performance Prize – level: Master's degree.)

    Abstract: The subject of this work is the design, construction and characterization of digital integrated circuits on Gallium Arsenide, operating at gigabits per second rates. High speed digital circuits are essential to improve the performance of computers, high capacity communication systems, military systems and instrumentation. Gallium Arsenide monolithic integrated circuits are a solution for high speed applications, presenting low power consumption at gigabits per second operating range. This work presents the main static logic families employing GaAs MESFETs and a comparison among their characteristics. The main issues on the design of high speed digital integrated circuits are discussed and applied to the design of a demultiplexer circuit. This circuit was designed to operate up to 2.5 Gb/s as a 1:4 or a 1:16 demultiplexer and integrates a skip circuit. Topologies for high speed demultiplexer and skip circuits are analyzed  and the design of a demultiplexer employing tree type architecture and D-type and Tristate flip-flops is presented in detail. The skip circuit was designed employing a new topology obtained modifying circuits presented in the literature. The designed circuit was constructed using a commercially available foundry service based on a 1 micron MESFET technology. The design approach employed SCFL standard cells. The resulting chip area is 2.5 x 2.5 millimeters square. Issues on characterization of high speed digital circuits are discussed and the experimental results of the demultiplexer are presented. The circuit demonstrated correct operation in both 1:4 and 1:16 demultiplexing modes, operating up to 2.7 Gb/s with 1.4 W of power consumption. The correct operation of the skip circuit demonstrated the effectiveness of the circuit topology proposed in this work. The performance of the demultiplexer with the integrated skip circuit allows its use on signal processing at optical communication systems using SDH and SONET standards.

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    Patents 

    Processes or techniques with registration or patent

  1. ABRÃO, T., CORRERA, F. S., CORSO, V. Circuito de 'Skip' Série de Alta Velocidade sem 'Retiming', 1995 Patent type: Privilege of Innovation number PI95 02399-2, - High speed digital Skip circuit without retiming (Deposit in July of 1995 - Brazil).

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    Technical report

    1. ABRÃO, T., JESZENSKY, P. J. E. Sucessive and Parallel Interference Cancellation for DS/CDMA Boletim Técnico. São Paulo: Escola Politécnica da USP/Departamento de Engenharia de Telecomunicações e Controle, 2000. (in Portuguese)

    2. ABRÃO, T., CORRERA, F. S. A 2.488 Gb/s GaAs 1:4/1:16 Demultiplexer IC with Skip Circuit for Sonet STS-12/48 Systems. Boletim Técnico da Escola Politécnica da USP. São Paulo: Escola Politécnica da USP / Departamento de Engenharia Eletrônica, 1996.

    Abstract: Integrated Circuits, Digital Demultiplex, Skip Circuit This paper reports an experience on the design of high-speed digital GaAs ICs, emphasizing the issues on circuit architecture, layout, fabrication and characterization at Gb/s rates. A 1:4/1:16 demultiplexer IC has been designed to operate up to 2.5 Gb/s. The demultiplexer employs a tree type architecture based on 1:2 demux blocks using Tristage flip-flops, that allows high-speed performance with low power dissipation. A new skip circuit without re-timing at clock rate was proposed and integrated to the demultiplexer for frame alignment purposes. The IC has been fabricated employing 1 mm MESFET SCFL standard cells from a commercially available foundry service. The proposed skip circuit demonstrated its effectiveness and the IC operated successfully either as a 1:4 or a 1:16 demultiplexer up to 2.5 Gb/s with power dissipation of 1 W. This IC is applicable for signal processing on SONET STS-12/48 optical communication systems.

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