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Ajay Kashyap Mtech Computer Technology (Final Sem.)
Permanent Address 502/503 Surya Nagar complex, Titardi, Udaipur (Rajasthan) Contact No: 9829013090
Correspondence Address A-45,Jwalamukhi Hostel, IIT Delhi, Hauz Khas, New Delhi E-mail: think_ajay@yahoo.co.in
Career Objective I want to attain high levels of technical excellence while making significant positive contributions to the organization.
Educational Qualification
Technical Skills
M.Tech Major Project Title : Design and Implementation of Dyanmic source routing algorithm for CFPSM (Contention Free Power Safe Mode) on WLAN for variable bit rate traffic. Team Size : 1 Description : The CFPSM is the modifiaction over standrad 802.11b power save algorithm. The result of CFPSM is better then 802.11b in terms of power consumption & throughput and now we have to design some type of routing algorithm over it.
M.Tech Minor Project
Title : Embedded Web Server for Home Networking using Rabbit3000 Microprocessor Team Size : 1 Duration : 6 month Description : The Embedded web server provides us a facility to control devices using simple html pages. We can control the appliances in home using a universal web browser. I have implemented web server for simple HTML pages, Dynamic HTML page, HTML forms. I have used the RCM 3000 development kit for the purpose of development. My work includes the configuration of hardware setup and implementation of web server’s over the network.
B.E. Final Year Projects
Project Title : Coach Guidance System Company Sponsor : Computex Solutions, Jodhpur Team Size : 2 Duration : 6 month Implementation : Surat & indore railway station Description Development of “Coach Guidance System” using 89c51 Microcontroller and LED Matrix of size 24 x 64. It was a live project taken from the “Indian Railway”. The whole system is controlled by a single computer which communicates and controls the various Remote End Boards (Display Boards) by using “HDLC Protocol”. A display board is implemented as a “Raster Scan Display”. The remote end board size can be extended up to a fix higher limit.
B.E Final Year Seminar “Itanium-An Explicit Parallel Instruction computing Device”. Itanium is Intel’s first 64-bit processor. It has large register set, new floating point architecture and explicit parallel code generation enable Itanium to most directly benefit specific classes of applications.
Industrial Training (1) Organization Name : Secure Meters Limited, Udaipur Days : 75 (after end of B.E. 3rd year) Project : Developed Embedded System which controls Devices for implementing “Radio Susceptibility Test”. Which is used to test various microprocessor based energy meters developed by Secure Meters. This software communicates with controlling device for this test via RS-232 and IEEE-488 interface for creating and run time changing the environment of the test. At runtime, the system read meters using serial port and logs the errors if any. (1) Organization Name : Rajasthan States Mines & Minerals Days : 45 (after end of B.E. 2nd year) Project : Developed a database for Computer Maintenance Department of Rajasthan States Mines & Minerals using Visual FoxPro and provided a Graphical User Interface to access it.
Project Undertaken Project Title : Traffic Control System. Team Size : 1 Duration : 1 month Description : Design and Implementation of Traffic control system using microprocessor 8085, interface chip8255, timer chip 8254 and various logical chips etc.
Project Title : Design of Assembler for 8051 Team Size : 1 Duration : 1 month Description : Design and Implementation of Assembler for 8086, which takes the code in 8086 assembly language and generate the intermediate output listing.
Project Title : Implementation of Feature based Morphing Team Size : 2 Duration : 15 days Description : Design and Implementation of Feature based Morphing using C and horatio.
Project Title : Implementation of Image Water Marking Team Size : 2 Duration : 15 days Description : Image Watermarking is the process of embedding some information into an image which helps establish the ownership of the image. We have implemented visible water marking for digital image.
Project Title : Implementation of fog in 3-D image. Team Size : 2 Duration : 15 days Description : Fog is nothing more then an atmospheric attenuation. We have designed a 3-d farmer field and implement fog in it.
Project Title : XML Inference Engine Team Size : 2 Duration : 15 days Technology Used : JDOM (java DOM) Description : Design of a language using XML which implement simple predicate logic and implementation of an inference engine for this language using DOM. Project Title : Design & implementation of Web based Registration cum Grading system Team Size : 2 Duration : 1 month Design : UML Design Technology Used : JSP, EJB, JDBC Description : This registration cum grading system is implemented for an institute. The system has various layers includes student, teacher and course coordinator. The students are allow to all operation regarding course registration (like register a course, add/drop a course....etc). The teacher can grade student. The system implements the complete J2EE three tire architecture. The JSP is used as front end and EJB used to implement business logic.
Personal Details Date of birth : 12th August 1979 Father’s Name : Sh. Vijay Kumar Kashyap Nationality : Indian Gender : Male Marital Status : Single
Extra Curricular Activities
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