Y.F. Zhang - P. Csillag : "Parallel architecture for high-speed Viterbi decoding of convolutional codes"
Electronics Letters, 6 July 1989, Vol.25, N°14, pp. 887-888
Contributions to conferences:
- M. Fornoff - P. Csillag - F. Castanié : "Test aléatoire appliqué à un microprocesseur 8 bits ayant subi des contraintes spatiales"
Journée d'Électronique 1983: Test des Circuits Intégrés Complexes, Lausanne (Switzerland), 11-13 oct. 1983, pp.171-180
- W. Yé - J.L. Gasser - P. Csillag : "Application of Parametric Methods to Random Testing of Microprocessors"
Congrès IASTED, Paris, 19-21 June 1985
- M. Fornoff - P. Csillag - F. Castanié : "A Parametric Approach to Microprocessor Random Testing"
10° congrès IMEKO, Prague (Czech Republic), 22-26 April 1986, vol.5, pp.61-68
- J.L. Gasser - W. Yé - P. Csillag : "Use of Parametric Methods to Detect Microprocessor's Failures"
Congrès EUSIPCO, 1986, Den Haag (Netherland), 2-5 September 1986
- A. Benhallam - P. Csillag : "Model Parametrisation for a Sequential Decoder of Convolutional Codes"
International AMSE conf., vol.2A, pp.101-112, Karlsruhe (Germany), July 1987
- A. Benhallam - P. Csillag : "Evaluation par simulation des performances d'un décodeur séquentiel des codes convolutionnels"
MONTECH'87 Conférence Compint'87 pp.360-363, Montréal (Canada), 9-12 November 1987
- Y.F. Zhang - P. Csillag : "High-Speed Parallel Viterbi Decoding of Convolutional Codes"
AAECC 7 International conf., Toulouse (France), 26-30 June 1989
Final reports:
- M. Fornoff - P. Csillag : "Étude d'un principe de test aléatoire, application au microprocesseur EF 6809"
HALO project, contract n°82/CNES/0789, 1982-83
- Y.F. Zhang - P. Csillag : "Analyse de l'architecture parallèle du décodage de Viterbi des codes convolutionnels"
Final contract report CEIS Espace, November 1989
Please, don't hesitate to any remarks, questions or suggestions.
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