CALL FOR PAPERS

IEEE Transactions on Circuits and Systems for Video Technology

Special Issue on Algorithm/Architecture Co-Exploration of Visual Computing on Emerging Platforms

Concurrent exploration of both algorithmic and architecture optimizations is now a new design paradigm. This special issue focuses on the latest research and development of video coding, processing, and computing algorithms on emerging platforms having multiple/many cores and reconfigurable architecture, including MPSoC, FPGA, multi-core DSP, multi-core CPU, GPGPU, and grids.

The algorithms in forthcoming visual systems are becoming more and more complex; many applications are required to be deployed with different profiles having different levels of performance. Hence, with expectations in rendering the best visual experience in the future, it is critical that advanced platforms featuring higher performance, better flexibility, and lower power consumption be provided.

To achieve these objectives, algorithm and architecture co-design is critical. Traditional design methodologies involving one-way mapping of a fully specified algorithm to a selected architecture are not adequate anymore to cope with future challenges. Hence, seamless weaving of the two previously autonomous visual computing algorithmic development and multi-core or reconfigurable architecture development will unavoidably be observed.

Systems with multiple cores and reconfigurable architectures open new possibilities for visual system designers in implementing highly complex visual computing algorithms which were not feasible traditionally. The advances of semiconductor technologies also facilitates emerging platforms possessing ever increasing number of processing units and better reconfigurability with examples witnessed by today�s high-end GPUs having 256 processors, video game consoles consisting of 8-core processors, and some of the latest laptops even coming with 4-core processors. Therefore, homogenous or heterogeneous multi-core platforms with more and more processing units are expected to become the leading trend in the future.

Henceforth, high quality research papers are solicited to address theoretical as well as practical issues and design cases related to the Special Issue's theme. Topics of interest listed include, but are not limited to:

Submission Procedure:

A new procedure is implemented for this special issue for the ease of editorial work: Before Jan 20, the authors are kindly asked to email the abstract (up to 500 words) and the list of references to the guest editors. Subsequently, the authors are asked to submit their manuscript thru the link http://tcsvt.polito.it before Jan 31, and email the control number of the manuscript to the guest editors again. Failure to follow this procedure might result in substantial delay to the review process, which could in turn exclude the manuscript from the special issue.

Moreover, the final manuscript without the biography should be submitted using the IEEE single-space, two-column format. The template files for LaTeX and Word are available for downloaded from http://www.ieee.org/pubs/authors.html. The manuscripts must be 9 pages or less. Submitted manuscripts with larger number of pages will be rejected automatically without being reviewed.

Finally, the relationship to visual computing and emerging platforms with multiple/many cores should be explained clearly in the submission.

Important Dates:

Guest Editors:

Yen-Kuang Chen, Intel Corporation (yen-kuang.chen@intel.com)
Gwo Giun (Chris) Lee, National Cheng Kung Univ (clee@mail.ncku.edu.tw)
Marco Mattavelli, �cole Polytechnique F�d�rale de Lausanne (marco.mattavelli@epfl.ch)
Euee S. Jang, Hanyang University (esjang@hanyang.ac.kr)