System Bus Specifications: http://www.sollae.co.kr/~mhyun/interest/bus/bus.html
Answer | Correct Statement |
1. F | On desktop personal computers, the electronic components and most storage devices are part of the system unit. |
2. T | The motherboard is the main circuit board of the system unit. (See errata for discussion of the passive back plane.) |
3.
F (Text wanted you to say T) |
Pipelining is when the processor begins fetching a second instruction before it completes the instruction cycle for the first instruction. (See errata. Text uses "machine cycle" when it should say "instruction cycle". A "machine cycle" is the same as a "clock cycle". It is the usual case that multiple machine cycles are needed to execute a single instruction.) |
4. T | With a piggyback upgrade, you stack the new processor chip on top of the old one. |
5. T | A bit is the smallest unit of data the computer can process. |
6. F | A gigabyte equals 230 bytes, or approximately 109 bytes, which is about 1 US billion or 1 UK million million. [1 UK billion = 1 US trillion] |
7. T | Random Access Memory (RAM) chips usually reside on a memory module. |
8. T | Read-only memory (ROM) refers to memory chips storing permanent data and instructions. |
9. F | You can change a flash memory chard without having to open the system unit or restart the computer. |
10. F | Apple Firewire (IEEE 1394) port supports Plug and Play. |
11. T | A bay is an opening inside the system unit in which you can install additional equipment. |
1a. What is the system clock?
The system clock is a small quartz crystal and associated circuit used to control the timing of all computer operations on a microcomputer. Main frame computers have a separate clock for the CPU, and the CPU operates asynchronously with the rest of the computer.
1b. How does clock speed affect a computer's speed?
If the clock speed on a particular computer is increased, the timing signals will increase in frequency. As long as the clock speed is not faster than the maximum propagation delay of signals in the computer, the computer will act satisfactorily, and therefore the speed of the computer will increase. If the speed of the clock is increased a little too much, the computer will effectively slow down due to having to handle error conditions and retransmission of data due to bad parity checks. As speed of the system clock continues to increase, the computer becomes inoperable. A computer is designed as a whole system. All the components must be able to work together. Merely increasing the clock speed does not necessarily result in faster system performance. When considering an accelerator board or increasing the clock speed, be sure to check the technical documentation of the system motherboard and vendor application notes.
2a. How are a chip-for-chip upgrade, a piggyback upgrade, and a daughterboard upgrade different?
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A chip-for-chip upgrade requires you to remove the existing processor chip and replace it with a new one. |
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A piggyback upgrade is done by stacking the new processor chip on top of the old one. |
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A daughterboard upgrade is done by plugging the new processor daughterboard into the motherboard. |
2b. What is a zero-insertion force (ZIF) socket?
The purpose of a zero-insertion force socket design is to reduce pin damage to the chip. A ZIF socket has a lever that applies a force upward over an area in the center of the processor chip to raise the chip evenly out of its socket. Newer ZIF sockets further reduce the force required by having a locking panel that releases sideways compression on pins before lifting motion is applied.
3a. How is dynamic RAM different from static RAM?
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DRAM uses one transistor and one capacitor for each bit stored. Before the capacitor discharges too much, the state of the transistor must be sensed, and the proper state refreshed. The refresh rate is every 60-70 ns. |
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Static RAM uses two transistors per bit, and power is maintained constantly. It therefore does not have to be refreshed. Average access time for static RAM is faster than for dynamic RAM. |
3b. Why are synchronous DRAM, Double Data Rate SDRAM, and Rambus DRAM chips faster than basic DRAM?
For a very good review of memory technology, see http://www.pctechguide.com and click on System Memory.
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Synchronous DRAM chips exploit the principle of locality that observes that if one memory location is fetched, then it is very likely that the next location will also be fetched. SDRAM architecture implements a burst mode for read-out which is synchronized to the system clock. |
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Double Data Rate SDRAM can transfer data on both the rising edge and the falling edge of the clock pulse rather than just once for each clock cycle. |
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Rambus DRAM chips use pipelining architecture. |
4a. What is memory cache?
Memory cache is high speed temporary storage located between primary storage and the CPU and used to preposition data and instructions closer to the CPU for rapid access.
4b. How are the three types of cache (Level I, Level II, and Level III) different?
Cache levels differ primarily in proximity to the CPU and the complexity of circuitry associated with the particular cache. The idea is to migrate instructions and data from inexpensive large capacity slower storage to much faster storage so that they are available without delay to the CPU when actually needed. This involves predicting what will be needed in the future and choosing a pre-positioning strategy that will maximize overall system performance.
L1, L2, L3 only indicate the logical nearness of a cache to the CPU. L1 is closer, and usually more sophisticated in design, than L2. Similarly, L2 is closer, and possibly more sophisticated in design, than L3. Usually, increased number of levels of cache, and increased cache sizes are accompanied by appropriate designs that result in increased overall system performance with successive generations of chip designs.
Other terms describe the design properties of a cache.
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Larger cache with less extensive capabilities are logically and physically further from the CPU in architecture. From the table below, observe that the trend is towards using a multi-level cache system. | ||||
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As wavers increase in size, and line widths decrease, the trend is to place more components on the same wafer. This decreases overall system manufacturing cost while increasing performance. | ||||
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Common organizations of cache are: associative cache, direct-mapped cache, and set-associative cache (which is an extension of the direct-mapped cache strategy). | ||||
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Some cache have a write-through architecture that stores changes to main memory simultaneously with cache to ensure concurrency of data. Another cache design is the copy-back strategy which writes to memory only when preparing to overwrite the cache entry, if that cache line has changed. | ||||
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Cache
design continues to increase in sophistication. For the Itanium II,
|
Processor | Level I | Level II | Level III |
486 DX | 8 kB | ||
Pentium | 16 kB | ||
Pentium Pro | 16 kB | 256 or 512 kB | |
Pentium II | 32 kB | 256 or 512 kB | |
Pentium III | 32 kB | 512 kB | |
Pentium III and Pentium III Xeon 700 MHz | 32 kB | 256 kB | |
Pentium 4 | 8 kB | 256 kB | |
Xeon MP 1.6 GHz | 8 kB | 256 kB | 1 MB |
Itanium II | 16
kB for Instructions 16 kB for Data |
256 kB | 1.5 or 3 MB |
IA-32 Intel Architecture Software Developer's Manual, Volume I: Basic
Architecture
Introduction to Microarchitectural Optimization for ItaniumŪ 2 Processors:
Reference Manual
Andrew S. Tanenbaum, Structured Computer Organization, Third Edition,
Prentice Hall (1990), Pages 209-215.
5a. How are male connectors different from female connectors?
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Male connectors have pins. |
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Female connectors have holes. |
5b. What is a gender changer and when would it be used?
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A Gender Changer is an adapter that has either pins at each connector, or has holes at each connector. |
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A Gender Changer is used to connect two cables having the same gender connector. This is useful when connecting multiple computers to the same printer in an office. |
1. a. What is the purpose of the CPU?
Answer The central processing unit (CPU) interprets and carries out the basic instructions that operate a computer.
1.b. What is the control unit's job?
Book answer: The control unit interprets each instruction issued by a program and then initiates the appropriate action to carry out the instruction.
This is not the same as the translator called an interpreter.
The control unit issues the timing and control signals. It includes a system clock, which is used to generate timing signals for the rest of the computer. It includes interrupt signal lines. The control unit uses logic gates to decode an instruction and to initiate the control signals needed to carry out the instruction. It is common for sophisticated processors to use a sequence of microinstructions to implement instructions.
1.c. What are the for basic operations?
Answer: The four basic operations are: Fetch, Decode, Execute, and Store.
2.a. How is instruction time, or I-time, different from execution time, or E-time? [buzz...]
Answer: The text defines Instruction time (i-time) as the time for fetch and decode. The text defines Execution time (e-time) as the time for execute and store.
I have not heard of the terms "I-time" and "E-time" before looking at this book. The far more common terms are "fetch time" and "execute time".
Mark Minasi, The Complete PC Upgrade & Maintenance Guide, Sybex (2000) pages 96-97, uses the breakdown: fetch, decode, get the operands, execute, write back results. It does not attempt to group these together.
Rodnay Zaks, Programming the Z80, Sybex (1980), pages 55-56, uses the breakdown: fetch, decode, and execute. The fetch cycle is discussed separately. The decode and execute cycles are discussed together.
Martha E. Sloan, Computer Hardware and Organization, Second Edition, Science Research Associates (1983), uses only the two states: fetch and execute.
Roger L. Tokheim, Microprocessor Fundamentals", Schaum's Outline Series, McGraw-Hill (1983), page 81, uses the categories: fetch, decode, and execute.
An instruction cycle often requires multiple machine cycles to complete its task. Variable-length instruction machines require variable number of machine cycles per instruction. A machine cycle consists of multiple clock cycles to accomplish the simplest elementary operation. On simple or old machines, a machine cycle was a clock cycle. Things got more complicated when IBM introduced the concept of microcode on the IBM360 for defining machine language instructions. Specific details are machine-dependent. Pipelining is possible because of the multiple cycles needed for instruction execution, by overlapping the stages of execution of instructions. This does not decrease the overall time required to execute a specific instruction, but it does allow an increase in the average rate of instruction completion.
2.b. In what unit is a computer's speed measured?
Answer: Computer speed is measured in several ways. In the consumer retail market, the clock speed is the measure most often reported. It is reported in megahertz (MHz) or gigahertz (GHz).In the professional computer world, a more meaningful measure is MIPS (millions of instructions per second). This is an average since instruction time varies depending on which instruction is being executed. On computers used for science and engineering calculations, MFLOPS (millions of floating point instructions per second) is the preferred measure. In practical evaluations, people run programs typical of the nature and mix of programs they intend to use the machine for. Standardized programs used for testing purposes are called "benchmarks". Results are recorded for a variety of machines and operating systems and compared.
Components in a computer operate at different speeds, with control cycles usually keyed to an integer multiple of the system clock cycle. The basic limiting factor affecting system design is memory chip speed. On personal computers, this is commonly 100 MHz or 133 MHz. Memory can be partitioned into memory banks to increase system speed by permitting different parts of memory to be accessed nearly simultaneously. For example, a two-bank memory can have all odd addresses assigned to one memory bank and all even addresses to the other memory bank.
3. How are arithmetic operations, comparison operations, and logical operations different?
Answer:
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Arithmetic operations include addition, subtraction, multiplication, and division. |
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Comparison operations test conditions of equality or inequality and alter the sequence of instruction execution when conditions are satisfied. |
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Logical operations are Boolean algebra operations, including AND, OR, NOT (logical complement), NAND (NOT AND), NOR, XOR (exclusive OR), and several others. There are 16 common logical operations, each with its own truth table. Not all the symbols in this handout will print because a required font is not supported by Acrobat. Sorry. |
4.a. What are some of the different processors used in today's personal computers?
General comment: Miniaturization and manufacturing circuits on a common chip increases reliability and speed, and decreases overall power consumption. The trend is to pack as much onto one chip as possible. Many features that existed on separate cards or on a motherboard are being migrated into the same package as the processor.
Critical technologies are materials science, line width, number of chip layers, and materials science.
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Intel
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AMD: Intel-compatible processors | ||||||
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Motorola
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Digital Equipment Corporation
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4.b. What is a new type of processor?
A new type of personal computer processor, called an integrated CPU, combines functions of a processor, memory, and a video card on a single chip.
5. How are components different among a desktop computer, a notebook computer, and a handheld computer?
Component | Desktop | Notebook | Handheld |
Power supply | External power | External power Battery |
Battery |
Chassis contents | Processor, memory, sound card, PC Card slot, drive bay | Keyboard, pointing device, speakers, display | Pointing device, buttons. |
Cost | $ 800 - $ 2,000 | More expensive than desktop. | A few hundred dollars. |
Ports | keyboard/mouse, IrDA, serial, paralle, video, and USB | IrDA Many have a serial port. Cradle |
1.b. What are registers?
Answer: The CPU uses temporary storage locations, called registers, to hold data and instructions. A microprocessor contains many different types of registers, each with a specific function. These functions include storing the location from where an instruction was fetched, storing an instruction while it is being decoded, storing data while the ALU (Arithmetic / Logic Unit) processes it, and storing the results of a calculation.
4. What are some special-purpose port used in many of today's computers? For what purpose is each port used?
MIDI Port: Musical Instrument Digital Interface. This is an interface standard. Learn a little more at http://nuinfo.nwu.edu/musicschool/links/projects/midi/pages/stmidifi.html . Get some of the technical details at http://www.music-center.com.br/spec_smf.htm .
SCSI Port: Small Computer System Interface. Learn more about upgrading the SCSI standards at http://www.zdnet.com/products/stories/reviews/0,4161,278589,00.html .
IEEE Standard 1394 Serial Port Specification (Texas Instruments P1394, Apple's FireWire): Learn more at http://www.ablecom.net/users/onspec/html/ieee_1394_port.html .
For short distances (less than 15 m), the parallel port approach will give better performance for fast data transfer than a serial port. If a serial port is good, a parallel version will be even better. For long distance, parallel transmission has a problem of synchronizing the arrival of bits. One transmission path may be very different in length than another path, requiring a different transmission time. This can cause bits from one transmission to arrive about the same time as bits from another transmission that travel on a different path. In this case, serial transmission is better.
IrDA Port: Learn more from the Infrared Data Association at http://www.irda.org/standards/specifications.asp .
5.a. How is a system bus different from an expansion bus?
There are 3 major bus types: the CPU bus, the address bus, and the data bus. These are not necessarily the same path width.
The CPU bus transfers data between components of the CPU, such as between the accumulator and registers.
The address bus transmits addresses between the CPU's program counter, address register, and the memory address registers.
The data bus transmits data between the CPU and the memory buffer register of main memory and other devices.
The text's system bus corresponds to the combination of the address bus and the data bus between the CPU and memory. These are separate functions. They can be (and often are) different widths. They may be carried over the same bus if the information is multiplexed onto the bus. The architecture of a system can establish different buses to match speeds and maximize overall system throughput. It is a tradeoff of cost and performance.
An expansion bus connects expansion slots to the system's data and control signal buses.
5.b. How is an internal drive bay different from an external drive bay?
A bay is an open area inside the system unit used to install additional equipment. An external drive bay allows access to a drive from outside the system unit. Removable media disk drives are mounted in external drive bays. An internal drive bay cannot be accessed from outside the system unit. Hard disks are usually mounted in internal drive bays.