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Archimedes page
Last page update: 2 Aug 1998
About the Archimedes and RiscPC machines
One year ago, I obtained an ARM-310 system with one 800K floppy drive.
The ARM-310 is one of the first of Acorn's line of personal computers based
on the ARM processor series. Some oddities about the ARM-310: It is one of
the few models which uses penlites for the CMOS instead of a rechargeable
battery. If your CMOS gets corrupted, try holding down DEL when you turn on
the computer to restore the factory settings. It runs RISCOS2.1 in ROM, but
the ROM is upgradable to RISCOS3.1. However, the upgrade requires some small
hardware patches, but I'm still looking for more information about this.
The ARM-310's 8 Mhz ARM-2 processor has a RISC architecture, which, in this
case, doesn't mean that one has to clobber in a dozen brain-damaging
instructions to write down a single operation, but rather, that the
instruction set is so universal that a small set of instructions covers all
functionality. As an example, it doesn't have stack instructions, but
instead, any of the 14 free registers may be used as a stack pointer using
the LDM and STM instructions, and all four possible stack schemes
(full/empty, and up/down) are possible. As a nice spin-off, it is also
possible to read and write data blocks quickly (I managed approx. 16
megabyte/second video bus throughput using them). As another example, the
program counter is one of the 16 universal registers, and hence, any
processing may be done on it, automatically adding a return-from-subroutine,
program-counter-relative addressing, and single-instruction jump-table
access. It also means that in order to write optimal code, there are only a
few rules you need to know. The cycles listed are for an ARM-310, and may be
less on newer models.
- There are only four types of instructions to learn: Register processing
(and compares), memory transfer, multiple memory transfer, and branches/SWIs.
The operand format of each is completely symmetrical, the only exception
being the multiply instructions MUL and MLA. Any instruction may be executed
conditionally according to the current state of the flags. Any register
processing instruction may optionally change the flags.
- Cram as much functionality as possible into each instruction. Every
instruction is 32 bits long, and takes an average of 1.25 cycles to execute,
except for memory transfers, which are 3 cycles plus 1 cycle added for each
memory access. This means memory access is relatively expensive, unless one
transfers multiple registers at a time: transfer one register, get the second
one (almost) for free!
- Don't jump! On an ARM-310, a jump will take 4 cycles, as it flushes the
pipeline. Use the conditional execution instead where possible.
- Finally, the thing you probably have to get used to most (if you have
experience with other CPUs) is the format of the immediate operands. These
are encoded into a 12-bit floating point format: 8 bits mantissa and 4 bits
exponent. The immediate value is generated from these using
Value =
Mantissa, ROL'ed by 2*Exponent
. This allows them to cover the whole
32-bit range logarithmically, while only taking up 12 bits in the opcode.
However, this implies that not all numbers in the 32-bit range are
immediately assignable! Some special pseudo-opcodes are available to make
life easier, but often, a careful choice of constants enables you to fit most
of your immediates within the proper range. Sometimes it is useful allocating
an extra register to hold an often-needed constant value.
For a good and complete reference (only 16 pages!) try:
Robin Watts et al's ARM docs.
For more technical documentation, see also
miscellaneous technical info
Software projects
Upcoming games 'n demos
I have been working on a little `hello world' game to get to grips with the
machine. Actually, I started on it almost a year ago, but the project was
in the fridge until recently. To show you I'm not talking shit, here are
some screenshots!
Meanwhile, Reinoud Zandijk and I have been organising some `computer
freaking' sessions. We've already produced some rough games and demos for the
Acorn, which we are planning to make available on this homepage. Right now,
Reinoud is working on a Vector game. It doesn't really seem to have a name,
though it is rumoured that some call it `Whoops!'. The player, who is
controlled in an `asteroids' manner, has to take care of the pods lying
around the screen. Meanwhile, enemies try to make life hard by hanging around
the pods and attacking the player. The pods are the player's lives; a life is
lost if a pod is shot accidentally, and the player is created from a pod
after getting killed.
Arcvic - a Vic-20 emulator
Last week I've written a Vic-20 emulator on my ARM machine. If you're
interested, see the Arcvic homepage.
Links
-
The Acorn Computer User WWW Server - Technical Info.
-
Frode M. Wells Web Site - Risc OS Software
-
Topix Acorn Division
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Acorn's StrongARM Risc PC
-
Acorn's upcoming machine: the Phoebe 2100
-
Acorn's own FTP Site
-
uni-stuttgart FTP site
-
The Acorn computer user WWW Server.
-
Acorn PD games reviews
-
HENSA archive
-
Miskin's Software home page
-
The Big Ben Club
-
32-bit Acorn Gaming
-
Xperience demo group
Boris van Schooten
Send suggestions/comments to:
vicman@dds.nl