PLL SSTC ( Phase locked loop driver)
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SSTCs are really cool. The problem of protecting the FETs can be resolved by using an " always in tune" system, with feedback (antenna or current transformer at the secondary base).
The PLL (phase locked loop) driver uses a VCO (voltage controled oscillator) and a phase comparator. This provides a continuous signal, in an established frequency interval, which put the secondary into oscillation. The feedback signal (radiated RF) excite the antenna and the circuit locks on the resonant frequency. It will track the frequency independent by the variations of the discharge load (streamers or arcs to ground).
I used the PLL driver built by Steve Conner.
Thanx Steve Conner and Adam Horden for advices and ss parts.
FIRST STEP
RESULTS: 1 inch streamers, 3 inches arcs to ground
ELECTRIC SCHEMA
SETUP PICTURES
SPARK PICS
I experimented some problems with the digital camera in the proximity of the SSTC, so i built an optical stuff (a sort of optical zoom) with two lenses (one divergent and the second convergent), to make pics at a safe distance. I tryed this thingy with my mum. Below are two pictures, one without the optical zoom and the other with zoom (see in the picture the borders of the convergent lens).
No optic zoom
With optic zoom
SECOND STEP
I observed that the phase locked at the maximum value of the R12 (resistor at the pin 12 of CD 4046), without even turning the potentiometer seried with it, so I felt that R12 can be lowered a bit. For the first step I used a variable 23.5 - 33.5 kohms value, but now I replaced it with a 15 - 25 kohms one (15 kohms resistor in serie with a 10 kohms potentiometer). I used all 20 turns on the primary, with a better resonant cap (MMC polipropilene 4.7 nF @ 4 kV) and increase the topload a bit.
RESULTS: 3-4 inches.
PICTURES
THIRD STEP
I reduced the number of primary turns at 10, used a new resonant cap ( 15 nF @ 8 kV ceramic), some more topload, AC/DC source for the logics.
PICTURES
AC/ DC LOGIC SOURCE : PICTURES
RESULTS: 5 - 6 INCHES
FOURTH STEP
I remade the primary (twisted turns at the bottom of the secondary, with only 8 turns), new primary cap (20 nF @ 2 kV polipropilene), better grounding, modifying the caps in the cap divider of the half bridge (1 uF each, instead 2.2 uF before). The FETs are only warm after 1 min runing but the primary windings are hot.

RESULTS:  9 inches sparks
LOOK FOR THE FURTHER MODIFICATIONS IN THE SCHEMA FOR BETTER RESULTS !
I am using a half bridge with IRFP460, protected with MUR3060 and 18 v Zenners on the gates, fed from mains through a variac, 0 - 220 vac, half rectifyed, resonant primary cap.
PICTURES
I didn' t have a scope so I had to tune in the hard way (modifying the primary tank parameters).
FIFTH STEP
I used the first primary for its best coupling coeficient, tuned at 7 turns, 21 nF @ 2 kV primary cap (MMC polipropilene), half bridge, 190 vac half rectifyed.

RESULTS:  12 inches sparks with rare hits at 13 inches.
SIXTH STEP
  8 primary turns, 21 nF cap, half bridge, 220 vac half rectifyed input.

RESULTS:  14 inches sparks (15 inches with a thicker wire primary turns)
PICTURES
PICTURES
STREAMER PICTURES
SPARKS ALONG GLASS DIELECTRIC - PICTURES
NEW (sep 22  2004)
I modifyed the PLL driver following the last modifications made by Steve Conner in his DW-DRSSTC setup.
The original schema can be found :
HERE
Steve used CT feedback. I am using antenna feedback (antenna base between the two 1N4148 diodes), just forget the left side of the schema. C6-7 on the 4046 is 690 pF. The double 100 Kohms potentiometer used for pin 11 and 12 resistences give a large interval of frequencies, allowing to use secondaries of different sizes. Trying different C6-7 caps will give you the best value to fit your secondary resonant frequency. The switch between the antenna base and the ground disable/enable the PLL, allowing you to find the right resonant frequency (run with the PLL disabled and 4046 working as a fixed frequency oscillator). Than enable the PLL and get the correct phasing. I dont use interrupter to enable/disable the UCCs driver chips, so I run CW.

My setup is a half bridge of IRFP260N, half wave 120 vac input. I kept the primary cap, so I run in CW- double resonant mode. Using high current FETs allows big sparks and healthy arcs to ground.

RESULTS: 9 - 10 inches streamers
PICTURES 1
PICTURES 2