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Dr. Yaseer A. Durrani has completed his Doctorate/Ph.D. in Industrial Microelectronics Eningeering (DIE),
from Polytechnic University of Madrid (UPM), Madrid, Spain. The Dissertation Title is "Power Macro-modelling for IP-based Digital Systems at Register Transfer Level". His research has been invloved in "Statistical Power Estimation, Power Optimization, and Low Power Consumption". His most of the work concentrate on Power Macro-modelling based approach that captures the dependence of the power dissipation of digital electronic circuits on its input/output signal switching statistics. This technique to estimate switching activity and power consumption at the Register Transfer Level (RTL) is for digital intellectual property (IPs) and the System-on-Chip (SoCs).
Dr. Durrani is currently working as a Chairman of the Dept. of Electronics & Telecommunicaiton Engineering at University of the Punjab (PU), Lahore, Pakistan. During (2007) he obtained his Post Graduate Research Diploma in Industrial Microelectronic Engineering from Polytechnic University of Madrid, Spain. In (2002) he completed his MSc. in Microelectronics Engineering specializing in System-on-Chip Design (SoC) from Royal Institute of Technology (KTH), Stockholm, Sweden. In (1999) he received his BSc. in "Electrical & Electronics Engineering (EE) from Eastern Mediterranean University (EMU), Turkish Cyprus. Earlier he obtained another BSc. in "Physics & Mathematics" from University of Peshawar, in (1995) (UPESH). Mr. Durrani is the member of Institute of Electrical & Electronics Engineers, (USA) (IEEE), and Pakistan Engineering Council (PEC). He has published technical papers in more than ten international conferences. Dr. Durrani has worked as an Assistant Professor at GIK Institute of Engineering Sciences & Technology (GIKI), Topi, Pakistan. Dr. Durrani was invited as Researcher in University of Victoria, (UVic) Victoria, Canada in (2005) and Ryerson University, Toronto, Canada. During (2001) he worked as a Design Engineer in Fibre Optics department, Infineon Technologies AG, (Infineon) Berlin, Germany for "Optimization of PLL and Serializer on LINC IC based on 0.18 micron CMOS Technology". He also worked as Computer Hardware Engineer in COSMO Computer Works, Pakistan in the field of System Support, Testing & Validation, Soldering, Hardware/Software Troubleshooting and had undergone training in Pak Telecom Company Ltd, Pakistan in Digital Switching Systems. His field of interest is System-On-Chip (SoC) related Low Power Consumption, Power Estimation, Power Optimization, ASIC Design, and Digital Control Systems. His favorite hobbies are paintings, reading, traveling, chess, table tennis and hiking. |
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