November 1, 1997:
The function of U11 has been discovered. (see pinout page) This will allow us to address Marvin's 1MB of I/O and extra RAM/ROM at 0x500000, but ONLY on Calcs with an internal ROM. Calcs with an external ROM are going to need a bit more hacking. We will only be hacking external ROM calcs if we have the need to.
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November 8, 1997:
We have started the Marvin Control Program. This is written in TIBASIC. You can see the most recent code here.
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November 11, 1997:
We have found out that addressing at 0x700000 is probably not a possibility. It seems that addressing pins above a20 may not even exist on the chip. If they do, they have not been found yet. Either way, we will be using I/O in the 0x400000-0x5FFFFF range where the external ROM module would be, since we are using calcs with an internal ROM. We will be accessing the I/O at 0x500000 just in case we cannot get ahold of calcs with internal ROMs later, we will not have to do massive reprogramming. We would just add in an AND gate to the CE signal to the ROM module to access only at 0x400000.
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November 22, 1997
We have tested U11 and confirmed that it is what we thought it was. We have also determined that we probably cannot readdress the external ROM to look like an internal ROM. It can be addressed there, but it will not boot off the internal ROM at 0x200000. Our next goal is to read from an I/O port that we will create, then write to one.
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November 27, 1997
Several procedures and commands have been finished in the programming language. Untested circuitry for an I/O port has been built. It consists of a 4-16 line decoder, one 7408 (AND chip) and one 7404 (hex inverter), and two 74373 (octal latch) chips. It is a R/W 2-byte memory section. It will be addressed at 0x200008 (because I am using a TI with an external ROM). This will be hooked directly up to the data and addressing bus tomorrow.
We have also decided to test the possibility of booting normal off of the ROM module, and then disabling the 0x200000 access to the ROM module so that I/O could be accessed from there. This would be done using a hardware switch. This technique will be used to address the 2-byte I/O at 0x200008. The actual I/O on the prototype will be addressed at 0x400000 since we will be using TI92's with internal ROM's.
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