Job title: Senior Principal Engineer
AKA: King of Cells,
Key responsibilities: Include but not limited to. Development of CMOS Standard Cell Libraries for SMC, USB (SIE and HUB), Serial IRQ, Training.
Department or workgroup: SMSC Component Engineering
Advance I/O Chip Development - Well someone has to keep churning out those I/O chips that go onto motherboards. Keep working on the ESD problems, and tune up the PLL's. ESD protection currently at 5 to 8KV. Cleaning up the last few 5KV problems to get us consistently over 8KV at 0.3um and 0.25um. Anyone out there doing better, or need some help - please let me know. I actually think we are doing pretty well.
Senior Principal Engineer
Trained some good engineers.
Made great friends over the years - I subscribe to never hold back the goods, someone out there may have what you need some day. I also subscribe to the golden rule. Eric, Henry, Ray, Sanosan, Jack, Joe, Camillo, Hakan, Ding, Doug, Andy, and Lou, (just to name a few) I would like to see you guys once in awhile.
1979-1998 Developed Custom integrated circuits (ASICS). Developed whole families of cell libraries.
- 1998 - Awarded patent for Bridge Mode. Release 0.35um Library with both staggered and in line pad cells.
- 1997 - Awarded patent for Low Power Power on Reset. Developed USB Serial Interface Engine (SIE)
1992 - Served on ISO9000 Auditing Team.
Developed first standard product Super IO. Ultra IO product support as required.
Architected Bridge Mode to bypass 8051 into it's memory space - Patent Pending
Worked on MPU (8051) enhancements added Int5 and Int6 plus other features
Floppy Disk Controller - architected enhancement to increased address space and simplified addressing modes by increasing width of instruction word; also original conversion from custom core to standard cells.
1995 - Serial IRQ as used in Super and Ultra IO devices.
- Developed Low Current POR circuits (less than 3mA @ 5.5v)- Patents Filed and Pending
- This circuit continuously monitors the power supply voltage for stability and retriggers the POR signal when necessary.
- Developed Low Noise - High Current Output Buffers with Short Circuit Protection - Patented
- Drives gently to that desired DC level without that killer ground switching spike and yet meets the required DC level with room to spare.
- Developed World Class Standard Cell Libraries for SMC component division including:
- 1.6u, 1.2u, 0.8u, 0.6u, 0.5 and 0.35 both pending development - All SMSC component chips in production today rely on the accuracy of these cell libraries. Pad cell boast 5KV ESD and plus/minus 300mA current without latchup at preferred wafer foundries. Libraries support multiple power and ground supplies at the schematic level through to netlisting, back annotated timing, and circuit files for LVS.
- 1987 - Transferred to Standard Products group as Principal Engineer after not being able to come to work without a kicking self in butt for several years. Immediately began to enjoy work again as the engineer that I was born to be.
- 1981-1986 as Manager of Custom Products, managed IC design group, IC test group, layout design, and a design automation group which grew to over 25 people.
- And there was the Venture project. A great experience for those of us who pulled it off.
- Ray, Lou, Joe, and myself.
- Early 80s - Patented Low Current NMOS - Depletion Mode Storage Element.
- This period is often referred to as the Andy Days or The DEP days.
- 1979-1981 as Senior Design Engineer, developed custom LSI in Custom Products Division. And there was Ray, Henry, Eric, Ron, Lester and Lester
