CAPACITIVE SENSOR
DIGITAL OUTPUT
WIDE TEMPERATURE RANGE
SURFACE MOUNT PACKAGE

FEATURES

• Digital Pulse Density Output

• Low Power Consumption

• -55 to +125 °C Operation

• Built-in Nitrogen Damping

• TTL/CMOS Compatible

• +5 VDC Power

• No External Reference Voltage

• Easy Interface to Microprocessors

• Good EMI Resistance

• Responds to DC & AC Acceleration

• Non Standard G Ranges Available
• Hermetic LCC or J-Lead Surface Mount Package

DESCRIPTION The Model 1010 accelerometer is a low-cost, integrated accelerometer for use in zero to medium frequency instrumentation applications.  It combines a micromachined capacitive sense element and a custom integrated circuit that includes a sense amplifier and a sigma-delta A/D converter in a single, miniature, hermetically sealed package.  It is relatively insensitive to temperature changes and gradients and each device is marked with a serial number on its bottom surface for traceability.

ORDERING INFORMATION Full Scale Acceleration Hermetic Packages 20 pin LCC 20 pin JLCC ±5 G 1010L-005 1010J-005 ±10 G 1010L-010 1010J-010 ±25 G 1010L-025 1010J-025 ±50 G 1010L-050 1010J-050 ±100 G 1010L-100 1010J-100 ±200 G 1010L-200 1010J-200

OPERATION The Model 1010 accelerometer produces a digital pulse train in which the density of pulses (number of pulses per second) is proportional to applied acceleration. It operates with a single +5 volt power supply and requires a clock of 100kHz-1MHz. The output is ratiometric to the clock frequency and independent of the power supply voltage. Two forms of digital signals are provided for direct interfacing to a microprocessor or counter. The sensitive axis is perpendicular to the bottom of the package, with positive acceleration defined as a force pushing on the bottom of the package. External digital line drivers can be used to drive long cables or when operated in an electrically noisy environment.

SIGNAL DESCRIPTIONS

VDD & GND (Power): Pin 14 (VDD) & pin 19 (GND). Additionally tie pins 3 & 11 to VDD & pins 2, 5, 6, & 18 to GND.

CLK (Input): Pin 8. Reference clock input. The hysteresis threshold input must be driven by a 50% duty cycle square wave signal. All 1010 series accelerometers are calibrated at 250 kHz which is the recommended clock frequency for best results. Operation at frequencies as low as 100 kHz or as high as 1MHz are possible, however a slight bias calibration shift may result.

CNT (Output): Pin 10. Count output. A return-to-zero type digital pulse stream whose pulse width is equal to the input CLK logic high time. The CNT pulse rate increases with positive acceleration. The device experiences positive (+1g) acceleration with its lid facing up in the earth's gravitational field. This signal is meant to drive an up-counter directly.

DIR and DIR^(not) (Output): Pins 12 and 16 respectively. Direction output. This output is updated at the fall of each clock cycle. It is high during clock cycles when a high going CNT pulse is present and low during cycles when no CNT pulse is present. A non-return-to-zero signal meant to control the count direction (i.e. up or down) of a counter. DIR can be low pass filtered to produce an analog measure of the acceleration. DIR^(not) is the compliment of DIR and is provided for use in driving differential transmission lines.

DV (Input): Pin 4. Deflection Voltage. Normally left open. A test input that applies an electrostatic force to the sense element, simulating a positive acceleration without application of an accelerative force.

VR (Input): Pin 3. Voltage Reference. Tie to same voltage as VDD or to a filtered version of +5V for better noise immunity. A 0.1uF bypass capacitor is recommended at this pin.

CLK/2 (Output): Pin 15. Clock divided by 2. A buffered clock output whose frequency equals CLK divided by 2.

PERFORMANCE by Model:  V_DD=5.0VDC, T_C=25 °C.

PERFORMANCE - All Models:  Unless otherwise specified V_DD=5.0VDC, F_CLK=250kHz, T_C=25 °C.