- VHDL programming for FPGA.
- C programming for Ladder Complier.
- 8 bits CPU.
- Omron C20 references.
- 5 input / 7 output
- 14 basic instructions.
- Variable instruction size (8 bits, 16 bits, 24 bits)
- 4 timer/counter (share)
- 64 internal register (auxiliary relay)
|
 Design PLC Using FPGA (Arithmetic Unit)  Design PLC Using FPGA (Arithmetic Unit RTL Level) |
