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This project is design PLC (Programmable Logic Controller). In addition, CPU is design by FPGA (Field Programmable Gate Array) and use VHDL as a language for modeling CPU of PLC.
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PLC is a device that use as relay circuit for control another device or machine in factory.
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In the design process, the researchers use top-down design model to develop the CPU. Initially, collect information and specification of PLC and it CPU then coding each part in VHDL language and test each part with simulation software to ensure that these parts are working correctly, then combine them together and test the corrective of the cooperation between these parts. Then bring the ived VHDL code into the synthesis process to convert into gate-level net list. Finally, load all of them into FPGA
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In this term, the CPU derived in this project can process Ladder language of PLC and has capability of instructions. In addition, the control unit is working correctly.
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 Design PLC Using FPGA (CPU Part) |
