Mnenomic Operation Addressing 
Mode
Instruction Condition Codes
Prebyte Opcode Operand Cycles
ASRA Arithmetic Shift Right A INH - 47 - 2
ASRB Arithmetic Shift Right B INH - 57 - 2
BCC Branch if Carry Clear REL - 24 rr 3
BCLR Clear Bit(s) DIR - 15 dd mm 6
IND, X - 1D ff mm 7
IND, Y 18 1D ff 8
BCS Branch if Carry Set REL - 25 rr 3
BEQ Branch if = Zero REL - 27 rr 3
BGE Branch if >= Zero REL - 2C rr 3
BGT Branch if > Zero REL - 2E rr 3
BHI Branch if Higher REL - 22 rr 3
BHS Branch if Higher or Same REL - 24 rr 3
BITA Bit(s) Test A with Memory IMM - 85 ii 2
DIR - 95 dd 3
EXT - B5 hh ll 4
IND, X - A5 ff 4
IND, Y 18 A5 ff 5
BITB Bit(s) Test B with Memory IMM - C5 ii 2
DIR - D5 dd 3
EXT - F5 hh ll 4
IND, X - E5 ff 4
IND, Y 18 E5 ff 5
BLE Branch if <= Zero REL - 2F rr 3
BLO Branch if Lower REL - 25 rr 3