| Mnenomic | Operation | Addressing
Mode |
Instruction | Condition Codes |
|||
| Prebyte | Opcode | Operand | Cycles | ||||
| BLS | Branch if Lower or Same | REL | - | 23 | rr | 3 | ![]() |
| BLT | Branch if < Zero | REL | - | 2D | rr | 3 | ![]() |
| BMI | Branch if Minus | REL | - | 2B | rr | 3 | ![]() |
| BNE | Branch if not = Zero | REL | - | 26 | rr | 3 | ![]() |
| BPL | Branch if Plus | REL | - | 2A | rr | 3 | ![]() |
| BRA | Branch Always | REL | - | 20 | rr | 3 | ![]() |
| BRCLR | Branch if Bit(s) Clear | DIR | - | 13 | dd mm rr | 6 | ![]() |
| IND, X | - | 1F | ff mm rr | 7 | |||
| IND, Y | 18 | 1F | ff mm rr | 8 | |||
| BRN | Branch Never | REL | - | 21 | rr | 3 | ![]() |
| BRSET | Branch if Bit(s) Set | DIR | - | 12 | dd mm rr | 6 | ![]() |
| IND, X | - | 1E | ff mm rr | 7 | |||
| IND, Y | 18 | 1E | ff mm rr | 8 | |||
| BSET | Set Bit(s) | DIR | - | 14 | dd mm rr | 6 | ![]() |
| IND, X | - | 1C | ff mm rr | 7 | |||
| IND, Y | 18 | 1C | ff mm rr | 8 | |||
| BSR | Branch to Subroutine | REL | - | 8D | rr | 6 | ![]() |
| BVC | Branch if Overflow Clear | REL | - | 28 | rr | 3 | ![]() |
| BVS | Branch if Overflow Set | REL | - | 29 | rr | 3 | ![]() |
| CBA | Compare A to B | INH | - | 11 | - | 2 | ![]() |
| CLC | Clear Carry Bit | INH | - | 0C | - | 2 | ![]() |
| CLI | Clear Interrupt Mask | INH | - | 0E | - | 2 | ![]() |
| CLR | Clear Memory Byte | EXT | - | 7F | hh ll | 6 | ![]() |
| IND, X | - | 6F | ff | 6 | |||
| IND, Y | 18 | 6F | ff | 7 | |||