| Mnenomic | Operation | Addressing
Mode |
Instruction | Condition Codes |
|||
| Prebyte | Opcode | Operand | Cycles | ||||
| LSL | Logical Shift Left | EXT | - | 78 | hh ll | 6 |  |
| IND, X | - | 68 | ff | 6 | |||
| IND, Y | 18 | 68 | ff | 7 | |||
| LSLA | Logical Shift Left A | INH | - | 48 | - | 2 | |
| LSLB | Logical Shift Left B | INH | - | 58 | - | 2 | |
| LSLD | Logical Shift Left D | INH | - | 05 | - | 3 | |
| LSR | Logical Shift Right | EXT | - | 74 | hh ll | 6 |  |
| IND, X | - | 64 | ff | 6 | |||
| IND, Y | 18 | 64 | ff | 7 | |||
| LSRA | Logical Shift Right A | INH | - | 44 | - | 2 | |
| LSRB | Logical Shift Right B | INH | - | 54 | - | 2 | |
| LSRD | Logical Shift Right D | INH | - | 04 | - | 3 | |
| MUL | Multiply 8 by 8 | INH | - | 3D | - | 10 |  |
| NEG | Two's Complement Memory Byte | EXT | - | 70 | hh ll | 6 | |
| IND, X | - | 60 | ff | 6 | |||
| IND, Y | 18 | 60 | ff | 7 | |||
| NEGA | Two's Complement A | INH | - | 40 | - | 2 | |
| NEGB | Two's Complement B | INH | - | 50 | - | 2 | |
| NOP | No Operation | INH | - | 01 | - | 2 |  |
| ORAA | OR Accumulator A (Inclusive) | IMM | - | 8A | ii | 2 |  |
| DIR | - | 9A | dd | 3 | |||
| EXT | - | BA | hh ll | 4 | |||
| IND, X | - | AA | ff | 4 | |||
| IND, Y | 18 | AA | ff | 5 | |||
