Arithmetic Cores

Introduction to number system

Introduction Floating point standards

The aim of this project is to develop generic synthesizable Arithmetic cores
Most of the cores are synthesized on different FPGAs and gave good results.
If you have any comments please email me.
You can find the latest version of the cores in the opencores CVS
To use these cores of for any licensing information please contact me and check the OpenIPCore site

• Floating Point Unit (FPU)
• Scaling Accumulator Multiplier. Serial MAC unit with two inputs. Core description, vhdl code, CVS "latest version"
• Digital filter core based on Distributed Arithmetic. Core description, download vhdl code , CVS "latest version"
• Barrel Shifter Core. Core description, vhdl code ,Verilog code CVS "latest version"
• Barrel Shifter/Rotater Core Thanks to Joao Pereira. VHDL code
• Packages used for some cores. tools package, components Package